Changeset c14754c in clfs-embedded for BOOK/cross-tools
- Timestamp:
- Nov 12, 2006, 9:06:25 PM (18 years ago)
- Branches:
- master
- Children:
- 9068678
- Parents:
- 4bdf1d0
- Location:
- BOOK/cross-tools/mips
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
BOOK/cross-tools/mips/uclibc.xml
r4bdf1d0 rc14754c 29 29 <screen os="b"><userinput>cp extra/Configs/Config.in extra/Configs/Config.in.orig 30 30 sed -e "s:default TARGET_i386:default TARGET_mips:" \ 31 extra/Configs/Config.in.orig > extra/Configs/Config.in</userinput></screen> 31 extra/Configs/Config.in.orig > extra/Configs/Config.in 32 cp extra/Configs/Config.mips extra/Configs/Config.mips.orig 33 sed -e "s:default CONFIG_MIPS_ISA_1:default CONFIG_MIPS_ISA_${CLFS_MIPS_LEVEL}:" \ 34 extra/Configs/Config.mips.orig > extra/Configs/Config.mips</userinput></screen> 32 35 33 36 <xi:include xmlns:xi="http://www.w3.org/2003/XInclude" -
BOOK/cross-tools/mips/variables.xml
r4bdf1d0 rc14754c 29 29 xpointer="xpointer(//*[@os='d'])"/> 30 30 31 <para os="d1">Now you will need to set the MIPS LEVEL. This determines how your 32 uClibc is built. There are currently 5 MIPS ISA Levels. To keep things simple 33 we are only using 2. For more information, go to 34 <ulink url="http://www.linux-mips.org/wiki/Instruction_Set_Architecture"/></para> 35 36 <screen os="d2"><userinput>export CLFS_MIPS_LEVEL="{mips level}"</userinput></screen> 37 31 38 <xi:include xmlns:xi="http://www.w3.org/2003/XInclude" 32 39 href="../x86/variables.xml" 33 40 xpointer="xpointer(//*[@os='e'])"/> 34 41 35 <xi:include xmlns:xi="http://www.w3.org/2003/XInclude" 36 href="../x86/variables.xml" 37 xpointer="xpointer(//*[@os='f'])"/>42 <screen os="f"><userinput>echo export CLFS_HOST=\""${CLFS_HOST}\"" >> ~/.bashrc 43 echo export CLFS_TARGET=\""${CLFS_TARGET}\"" >> ~/.bashrc 44 echo export CLFS_MIPS_LEVEL=\""${CLFS_MIPS_LEVEL}\"" >> ~/.bashrc</userinput></screen> 38 45 39 46 <table os="g"> … … 42 49 <colspec colname="Processor"/> 43 50 <colspec colname="Triplet"/> 51 <colspec colname="MIPS Level"/> 44 52 <thead> 45 53 <row> … … 52 60 <entry>MIPS 32 bits Little Endian</entry> 53 61 <entry>mipsel-unknown-linux-uclibc</entry> 62 <entry>1</entry> 54 63 </row> 55 64 <row> 56 65 <entry>MIPS 32 bits Big Endian</entry> 57 66 <entry>mips-unknown-linux-uclibc</entry> 67 <entry>1</entry> 58 68 </row> 59 69 <row> 60 70 <entry>MIPS 64 bits Little Endian</entry> 61 71 <entry>mips64el-unknown-linux-uclibc</entry> 72 <entry>3</entry> 62 73 </row> 63 74 <row> 64 75 <entry>MIPS 64 bits Big Endian</entry> 65 76 <entry>mips64-unknown-linux-uclibc</entry> 77 <entry>3</entry> 66 78 </row> 67 79 </tbody>
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