Index: scripts/fetch/eglibc/2.10.1/01-i586_check.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/01-i586_check.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/01-i586_check.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,31 @@
+2007-09-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* sysdeps/i386/i586/memcpy_chk.S: New file.
+	* sysdeps/i386/i586/mempcpy_chk.S: Likewise.
+	* sysdeps/i386/i586/memset_chk.S: Likewise.
+
+Index: sysdeps/i386/i586/memcpy_chk.S
+===================================================================
+RCS file: sysdeps/i386/i586/memcpy_chk.S
+diff -N sysdeps/i386/i586/memcpy_chk.S
+--- /dev/null	1 Jan 1970 00:00:00 -0000
++++ sysdeps/i386/i586/memcpy_chk.S	13 Nov 2007 01:56:18 -0000	1.1
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/memcpy_chk.S>
+Index: sysdeps/i386/i586/mempcpy_chk.S
+===================================================================
+RCS file: sysdeps/i386/i586/mempcpy_chk.S
+diff -N sysdeps/i386/i586/mempcpy_chk.S
+--- /dev/null	1 Jan 1970 00:00:00 -0000
++++ sysdeps/i386/i586/mempcpy_chk.S	13 Nov 2007 01:56:18 -0000	1.1
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/mempcpy_chk.S>
+Index: sysdeps/i386/i586/memset_chk.S
+===================================================================
+RCS file: sysdeps/i386/i586/memset_chk.S
+diff -N sysdeps/i386/i586/memset_chk.S
+--- /dev/null	1 Jan 1970 00:00:00 -0000
++++ sysdeps/i386/i586/memset_chk.S	13 Nov 2007 01:56:18 -0000	1.1
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/memset_chk.S>
+
Index: scripts/fetch/eglibc/2.10.1/05-localedef_segfault
===================================================================
--- scripts/fetch/eglibc/2.10.1/05-localedef_segfault	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/05-localedef_segfault	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,55 @@
+Description: Fixes Segfault when using localdef.
+             This problem is only noticed when using PaX
+             and some architectures besides x86.
+             See debian bug # 231438
+
+             Rediffed for 2.8 by Joe Ciccone
+             Rediffed for 2.9 by Joe Ciccone
+
+diff -Naur glibc-2.8.orig/locale/programs/3level.h glibc-2.8/locale/programs/3level.h
+--- glibc-2.8.orig/locale/programs/3level.h	2007-07-15 20:54:59.000000000 -0400
++++ glibc-2.8/locale/programs/3level.h	2008-09-20 12:09:34.000000000 -0400
+@@ -203,6 +203,42 @@
+ 	}
+     }
+ }
++
++/* GCC ATM seems to do a poor job with pointers to nested functions passed
++   to inlined functions.  Help it a little bit with this hack.  */
++#define wchead_table_iterate(tp, fn) \
++do									      \
++  {									      \
++    struct wchead_table *t = (tp);					      \
++    uint32_t index1;							      \
++    for (index1 = 0; index1 < t->level1_size; index1++)			      \
++      {									      \
++	uint32_t lookup1 = t->level1[index1];				      \
++	if (lookup1 != ((uint32_t) ~0))					      \
++	  {								      \
++	    uint32_t lookup1_shifted = lookup1 << t->q;			      \
++	    uint32_t index2;						      \
++	    for (index2 = 0; index2 < (1 << t->q); index2++)		      \
++	      {								      \
++		uint32_t lookup2 = t->level2[index2 + lookup1_shifted];	      \
++		if (lookup2 != ((uint32_t) ~0))				      \
++		  {							      \
++		    uint32_t lookup2_shifted = lookup2 << t->p;		      \
++		    uint32_t index3;					      \
++		    for (index3 = 0; index3 < (1 << t->p); index3++)	      \
++		      {							      \
++			struct element_t *lookup3			      \
++			  = t->level3[index3 + lookup2_shifted];	      \
++			if (lookup3 != NULL)				      \
++			  fn ((((index1 << t->q) + index2) << t->p) + index3, \
++			      lookup3);					      \
++		      }							      \
++		  }							      \
++	      }								      \
++	  }								      \
++      }									      \
++  } while (0)
++
+ #endif
+ 
+ #ifndef NO_FINALIZE
+
Index: scripts/fetch/eglibc/2.10.1/10-ppc-atomic.diff
===================================================================
--- scripts/fetch/eglibc/2.10.1/10-ppc-atomic.diff	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/10-ppc-atomic.diff	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,419 @@
+Index: sysdeps/powerpc/bits/atomic.h
+===================================================================
+RCS file: /cvs/glibc/libc/sysdeps/powerpc/bits/atomic.h,v
+retrieving revision 1.17
+diff -u -a -p -r1.17 atomic.h
+--- sysdeps/powerpc/bits/atomic.h	26 Mar 2007 20:15:28 -0000	1.17
++++ sysdeps/powerpc/bits/atomic.h	31 May 2008 08:50:56 -0000
+@@ -85,14 +85,14 @@ typedef uintmax_t uatomic_max_t;
+       __typeof (*(mem)) __tmp;						      \
+       __typeof (mem)  __memp = (mem);					      \
+       __asm __volatile (						      \
+-		        "1:	lwarx	%0,0,%1" MUTEX_HINT_ACQ "\n"	      \
++		        "1:	lwarx	%0,%y1" MUTEX_HINT_ACQ "\n"	      \
+ 		        "	cmpw	%0,%2\n"			      \
+ 		        "	bne	2f\n"				      \
+-		        "	stwcx.	%3,0,%1\n"			      \
++		        "	stwcx.	%3,%y1\n"			      \
+ 		        "	bne-	1b\n"				      \
+ 		        "2:	" __ARCH_ACQ_INSTR			      \
+-		        : "=&r" (__tmp)					      \
+-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
++		        : "=&r" (__tmp), "+Z" (*__memp)			      \
++		        : "r" (oldval), "r" (newval)			      \
+ 		        : "cr0", "memory");				      \
+       __tmp;								      \
+   })
+@@ -102,14 +102,14 @@ typedef uintmax_t uatomic_max_t;
+       __typeof (*(mem)) __tmp;						      \
+       __typeof (mem)  __memp = (mem);					      \
+       __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-		        "1:	lwarx	%0,0,%1" MUTEX_HINT_REL "\n"	      \
++		        "1:	lwarx	%0,%y1" MUTEX_HINT_REL "\n"	      \
+ 		        "	cmpw	%0,%2\n"			      \
+ 		        "	bne	2f\n"				      \
+-		        "	stwcx.	%3,0,%1\n"			      \
++		        "	stwcx.	%3,%y1\n"			      \
+ 		        "	bne-	1b\n"				      \
+ 		        "2:	"					      \
+-		        : "=&r" (__tmp)					      \
+-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
++		        : "=&r" (__tmp), "+Z" (__memp)			      \
++		        : "r" (oldval), "r" (newval)			      \
+ 		        : "cr0", "memory");				      \
+       __tmp;								      \
+   })
+@@ -118,12 +118,12 @@ typedef uintmax_t uatomic_max_t;
+   ({									      \
+     __typeof (*mem) __val;						      \
+     __asm __volatile (							      \
+-		      "1:	lwarx	%0,0,%2" MUTEX_HINT_ACQ "\n"	      \
+-		      "		stwcx.	%3,0,%2\n"			      \
++		      "1:	lwarx	%0,%y1" MUTEX_HINT_ACQ "\n"	      \
++		      "		stwcx.	%2,%y1\n"			      \
+ 		      "		bne-	1b\n"				      \
+ 		      "   " __ARCH_ACQ_INSTR				      \
+-		      : "=&r" (__val), "=m" (*mem)			      \
+-		      : "b" (mem), "r" (value), "m" (*mem)		      \
++		      : "=&r" (__val), "+Z" (*mem)			      \
++		      : "r" (value)					      \
+ 		      : "cr0", "memory");				      \
+     __val;								      \
+   })
+@@ -132,11 +132,11 @@ typedef uintmax_t uatomic_max_t;
+   ({									      \
+     __typeof (*mem) __val;						      \
+     __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-		      "1:	lwarx	%0,0,%2" MUTEX_HINT_REL "\n"	      \
+-		      "		stwcx.	%3,0,%2\n"			      \
++		      "1:	lwarx	%0,%y1" MUTEX_HINT_REL "\n"	      \
++		      "		stwcx.	%2,%y1\n"			      \
+ 		      "		bne-	1b"				      \
+-		      : "=&r" (__val), "=m" (*mem)			      \
+-		      : "b" (mem), "r" (value), "m" (*mem)		      \
++		      : "=&r" (__val), "+Z" (*mem)			      \
++		      : "r" (value)					      \
+ 		      : "cr0", "memory");				      \
+     __val;								      \
+   })
+@@ -144,12 +144,12 @@ typedef uintmax_t uatomic_max_t;
+ #define __arch_atomic_exchange_and_add_32(mem, value) \
+   ({									      \
+     __typeof (*mem) __val, __tmp;					      \
+-    __asm __volatile ("1:	lwarx	%0,0,%3\n"			      \
+-		      "		add	%1,%0,%4\n"			      \
+-		      "		stwcx.	%1,0,%3\n"			      \
++    __asm __volatile ("1:	lwarx	%0,%y2\n"			      \
++		      "		add	%1,%0,%3\n"			      \
++		      "		stwcx.	%1,%y2\n"			      \
+ 		      "		bne-	1b"				      \
+-		      : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
+-		      : "b" (mem), "r" (value), "m" (*mem)		      \
++		      : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem)	      \
++		      : "r" (value)					      \
+ 		      : "cr0", "memory");				      \
+     __val;								      \
+   })
+@@ -157,12 +157,12 @@ typedef uintmax_t uatomic_max_t;
+ #define __arch_atomic_increment_val_32(mem) \
+   ({									      \
+     __typeof (*(mem)) __val;						      \
+-    __asm __volatile ("1:	lwarx	%0,0,%2\n"			      \
++    __asm __volatile ("1:	lwarx	%0,%y1\n"			      \
+ 		      "		addi	%0,%0,1\n"			      \
+-		      "		stwcx.	%0,0,%2\n"			      \
++		      "		stwcx.	%0,%y1\n"			      \
+ 		      "		bne-	1b"				      \
+-		      : "=&b" (__val), "=m" (*mem)			      \
+-		      : "b" (mem), "m" (*mem)				      \
++		      : "=&b" (__val), "+Z" (*mem)			      \
++		      :							      \
+ 		      : "cr0", "memory");				      \
+     __val;								      \
+   })
+@@ -170,27 +170,27 @@ typedef uintmax_t uatomic_max_t;
+ #define __arch_atomic_decrement_val_32(mem) \
+   ({									      \
+     __typeof (*(mem)) __val;						      \
+-    __asm __volatile ("1:	lwarx	%0,0,%2\n"			      \
++    __asm __volatile ("1:	lwarx	%0,%y1\n"			      \
+ 		      "		subi	%0,%0,1\n"			      \
+-		      "		stwcx.	%0,0,%2\n"			      \
++		      "		stwcx.	%0,%y1\n"			      \
+ 		      "		bne-	1b"				      \
+-		      : "=&b" (__val), "=m" (*mem)			      \
+-		      : "b" (mem), "m" (*mem)				      \
++		      : "=&b" (__val), "+Z" (*mem)			      \
++		      :							      \
+ 		      : "cr0", "memory");				      \
+     __val;								      \
+   })
+ 
+ #define __arch_atomic_decrement_if_positive_32(mem) \
+   ({ int __val, __tmp;							      \
+-     __asm __volatile ("1:	lwarx	%0,0,%3\n"			      \
++     __asm __volatile ("1:	lwarx	%0,%y2\n"			      \
+ 		       "	cmpwi	0,%0,0\n"			      \
+ 		       "	addi	%1,%0,-1\n"			      \
+ 		       "	ble	2f\n"				      \
+-		       "	stwcx.	%1,0,%3\n"			      \
++		       "	stwcx.	%1,%y2\n"			      \
+ 		       "	bne-	1b\n"				      \
+ 		       "2:	" __ARCH_ACQ_INSTR			      \
+-		       : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
+-		       : "b" (mem), "m" (*mem)				      \
++		       : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem)	      \
++		       :						      \
+ 		       : "cr0", "memory");				      \
+      __val;								      \
+   })
+Index: sysdeps/powerpc/powerpc32/bits/atomic.h
+===================================================================
+RCS file: /cvs/glibc/libc/sysdeps/powerpc/powerpc32/bits/atomic.h,v
+retrieving revision 1.6
+diff -u -a -p -r1.6 atomic.h
+--- sysdeps/powerpc/powerpc32/bits/atomic.h	26 Mar 2007 20:15:45 -0000	1.6
++++ sysdeps/powerpc/powerpc32/bits/atomic.h	31 May 2008 08:50:56 -0000
+@@ -44,14 +44,14 @@
+ ({									      \
+   unsigned int __tmp;							      \
+   __asm __volatile (							      \
+-		    "1:	lwarx	%0,0,%1" MUTEX_HINT_ACQ "\n"		      \
++		    "1:	lwarx	%0,%y1" MUTEX_HINT_ACQ "\n"		      \
+ 		    "	subf.	%0,%2,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stwcx.	%3,0,%1\n"				      \
++		    "	stwcx.	%3,%y1\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	" __ARCH_ACQ_INSTR				      \
+-		    : "=&r" (__tmp)					      \
+-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "+Z" (*(mem))			      \
++		    : "r" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+@@ -60,14 +60,14 @@
+ ({									      \
+   unsigned int __tmp;							      \
+   __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-		    "1:	lwarx	%0,0,%1" MUTEX_HINT_REL "\n"		      \
++		    "1:	lwarx	%0,%y1" MUTEX_HINT_REL "\n"		      \
+ 		    "	subf.	%0,%2,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stwcx.	%3,0,%1\n"				      \
++		    "	stwcx.	%3,%y1\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	"						      \
+-		    : "=&r" (__tmp)					      \
+-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "+Z" (*(mem))			      \
++		    : "r" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+Index: sysdeps/powerpc/powerpc64/bits/atomic.h
+===================================================================
+RCS file: /cvs/glibc/libc/sysdeps/powerpc/powerpc64/bits/atomic.h,v
+retrieving revision 1.8
+diff -u -a -p -r1.8 atomic.h
+--- sysdeps/powerpc/powerpc64/bits/atomic.h	26 Mar 2007 20:16:03 -0000	1.8
++++ sysdeps/powerpc/powerpc64/bits/atomic.h	31 May 2008 08:50:56 -0000
+@@ -44,14 +44,14 @@
+ ({									      \
+   unsigned int __tmp, __tmp2;						      \
+   __asm __volatile ("   clrldi  %1,%1,32\n"				      \
+-		    "1:	lwarx	%0,0,%2" MUTEX_HINT_ACQ "\n"	 	      \
++		    "1:	lwarx	%0,%y2" MUTEX_HINT_ACQ "\n"	 	      \
+ 		    "	subf.	%0,%1,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stwcx.	%4,0,%2\n"				      \
++		    "	stwcx.	%4,%y2\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	" __ARCH_ACQ_INSTR				      \
+-		    : "=&r" (__tmp), "=r" (__tmp2)			      \
+-		    : "b" (mem), "1" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem))	      \
++		    : "1" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+@@ -61,14 +61,14 @@
+   unsigned int __tmp, __tmp2;						      \
+   __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+ 		    "   clrldi  %1,%1,32\n"				      \
+-		    "1:	lwarx	%0,0,%2" MUTEX_HINT_REL "\n"		      \
++		    "1:	lwarx	%0,%y2" MUTEX_HINT_REL "\n"		      \
+ 		    "	subf.	%0,%1,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stwcx.	%4,0,%2\n"				      \
++		    "	stwcx.	%4,%y2\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	"						      \
+-		    : "=&r" (__tmp), "=r" (__tmp2)			      \
+-		    : "b" (mem), "1" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem))	      \
++		    : "1" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+@@ -82,14 +82,14 @@
+ ({									      \
+   unsigned long	__tmp;							      \
+   __asm __volatile (							      \
+-		    "1:	ldarx	%0,0,%1" MUTEX_HINT_ACQ "\n"		      \
++		    "1:	ldarx	%0,%y1" MUTEX_HINT_ACQ "\n"		      \
+ 		    "	subf.	%0,%2,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stdcx.	%3,0,%1\n"				      \
++		    "	stdcx.	%3,%y1\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	" __ARCH_ACQ_INSTR				      \
+-		    : "=&r" (__tmp)					      \
+-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "+Z" (*(mem))			      \
++		    : "r" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+@@ -98,14 +98,14 @@
+ ({									      \
+   unsigned long	__tmp;							      \
+   __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-		    "1:	ldarx	%0,0,%2" MUTEX_HINT_REL "\n"		      \
++		    "1:	ldarx	%0,%y1" MUTEX_HINT_REL "\n"		      \
+ 		    "	subf.	%0,%2,%0\n"				      \
+ 		    "	bne	2f\n"					      \
+-		    "	stdcx.	%3,0,%1\n"				      \
++		    "	stdcx.	%3,%y1\n"				      \
+ 		    "	bne-	1b\n"					      \
+ 		    "2:	"						      \
+-		    : "=&r" (__tmp)					      \
+-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
++		    : "=&r" (__tmp), "+Z" (*(mem))			      \
++		    : "r" (oldval), "r" (newval)			      \
+ 		    : "cr0", "memory");					      \
+   __tmp != 0;								      \
+ })
+@@ -115,14 +115,14 @@
+       __typeof (*(mem)) __tmp;						      \
+       __typeof (mem)  __memp = (mem);					      \
+       __asm __volatile (						      \
+-		        "1:	ldarx	%0,0,%1" MUTEX_HINT_ACQ "\n"	      \
++		        "1:	ldarx	%0,%y1" MUTEX_HINT_ACQ "\n"	      \
+ 		        "	cmpd	%0,%2\n"			      \
+ 		        "	bne	2f\n"				      \
+-		        "	stdcx.	%3,0,%1\n"			      \
++		        "	stdcx.	%3,%y1\n"			      \
+ 		        "	bne-	1b\n"				      \
+ 		        "2:	" __ARCH_ACQ_INSTR			      \
+-		        : "=&r" (__tmp)					      \
+-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
++		        : "=&r" (__tmp), "+Z" (*__memp)			      \
++		        : "r" (oldval), "r" (newval)			      \
+ 		        : "cr0", "memory");				      \
+       __tmp;								      \
+   })
+@@ -132,14 +132,14 @@
+       __typeof (*(mem)) __tmp;						      \
+       __typeof (mem)  __memp = (mem);					      \
+       __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-		        "1:	ldarx	%0,0,%1" MUTEX_HINT_REL "\n"	      \
++		        "1:	ldarx	%0,%y1" MUTEX_HINT_REL "\n"	      \
+ 		        "	cmpd	%0,%2\n"			      \
+ 		        "	bne	2f\n"				      \
+-		        "	stdcx.	%3,0,%1\n"			      \
++		        "	stdcx.	%3,%y1\n"			      \
+ 		        "	bne-	1b\n"				      \
+ 		        "2:	"					      \
+-		        : "=&r" (__tmp)					      \
+-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
++		        : "=&r" (__tmp), "+Z" (*__memp)			      \
++		        : "r" (oldval), "r" (newval)			      \
+ 		        : "cr0", "memory");				      \
+       __tmp;								      \
+   })
+@@ -148,12 +148,12 @@
+     ({									      \
+       __typeof (*mem) __val;						      \
+       __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-			"1:	ldarx	%0,0,%2" MUTEX_HINT_ACQ "\n"	      \
+-			"	stdcx.	%3,0,%2\n"			      \
++			"1:	ldarx	%0,%y1" MUTEX_HINT_ACQ "\n"	      \
++			"	stdcx.	%2,%y1\n"			      \
+ 			"	bne-	1b\n"				      \
+ 		  " " __ARCH_ACQ_INSTR					      \
+-			: "=&r" (__val), "=m" (*mem)			      \
+-			: "b" (mem), "r" (value), "m" (*mem)		      \
++			: "=&r" (__val), "+Z" (*(mem))			      \
++			: "r" (value)					      \
+ 			: "cr0", "memory");				      \
+       __val;								      \
+     })
+@@ -162,11 +162,11 @@
+     ({									      \
+       __typeof (*mem) __val;						      \
+       __asm __volatile (__ARCH_REL_INSTR "\n"				      \
+-			"1:	ldarx	%0,0,%2" MUTEX_HINT_REL "\n"	      \
+-			"	stdcx.	%3,0,%2\n"			      \
++			"1:	ldarx	%0,%y1" MUTEX_HINT_REL "\n"	      \
++			"	stdcx.	%2,%y1\n"			      \
+ 			"	bne-	1b"				      \
+-			: "=&r" (__val), "=m" (*mem)			      \
+-			: "b" (mem), "r" (value), "m" (*mem)		      \
++			: "=&r" (__val), "+Z" (*(mem))			      \
++			: "r" (value)					      \
+ 			: "cr0", "memory");				      \
+       __val;								      \
+     })
+@@ -174,12 +174,12 @@
+ #define __arch_atomic_exchange_and_add_64(mem, value) \
+     ({									      \
+       __typeof (*mem) __val, __tmp;					      \
+-      __asm __volatile ("1:	ldarx	%0,0,%3\n"			      \
+-			"	add	%1,%0,%4\n"			      \
+-			"	stdcx.	%1,0,%3\n"			      \
++      __asm __volatile ("1:	ldarx	%0,%y2\n"			      \
++			"	add	%1,%0,%3\n"			      \
++			"	stdcx.	%1,%y2\n"			      \
+ 			"	bne-	1b"				      \
+-			: "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
+-			: "b" (mem), "r" (value), "m" (*mem)		      \
++			: "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem))	      \
++			: "r" (value)					      \
+ 			: "cr0", "memory");				      \
+       __val;								      \
+     })
+@@ -187,12 +187,12 @@
+ #define __arch_atomic_increment_val_64(mem) \
+     ({									      \
+       __typeof (*(mem)) __val;						      \
+-      __asm __volatile ("1:	ldarx	%0,0,%2\n"			      \
++      __asm __volatile ("1:	ldarx	%0,%y1\n"			      \
+ 			"	addi	%0,%0,1\n"			      \
+-			"	stdcx.	%0,0,%2\n"			      \
++			"	stdcx.	%0,%y1\n"			      \
+ 			"	bne-	1b"				      \
+-			: "=&b" (__val), "=m" (*mem)			      \
+-			: "b" (mem), "m" (*mem)				      \
++			: "=&b" (__val), "+Z" (*(mem))			      \
++			:						      \
+ 			: "cr0", "memory");				      \
+       __val;								      \
+     })
+@@ -200,27 +200,27 @@
+ #define __arch_atomic_decrement_val_64(mem) \
+     ({									      \
+       __typeof (*(mem)) __val;						      \
+-      __asm __volatile ("1:	ldarx	%0,0,%2\n"			      \
++      __asm __volatile ("1:	ldarx	%0,%y1\n"			      \
+ 			"	subi	%0,%0,1\n"			      \
+-			"	stdcx.	%0,0,%2\n"			      \
++			"	stdcx.	%0,%y1\n"			      \
+ 			"	bne-	1b"				      \
+-			: "=&b" (__val), "=m" (*mem)			      \
+-			: "b" (mem), "m" (*mem)				      \
++			: "=&b" (__val), "+Z" (*(mem))			      \
++			:						      \
+ 			: "cr0", "memory");				      \
+       __val;								      \
+     })
+ 
+ #define __arch_atomic_decrement_if_positive_64(mem) \
+   ({ int __val, __tmp;							      \
+-     __asm __volatile ("1:	ldarx	%0,0,%3\n"			      \
++     __asm __volatile ("1:	ldarx	%0,%y2\n"			      \
+ 		       "	cmpdi	0,%0,0\n"			      \
+ 		       "	addi	%1,%0,-1\n"			      \
+ 		       "	ble	2f\n"				      \
+-		       "	stdcx.	%1,0,%3\n"			      \
++		       "	stdcx.	%1,%y2\n"			      \
+ 		       "	bne-	1b\n"				      \
+ 		       "2:	" __ARCH_ACQ_INSTR			      \
+-		       : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
+-		       : "b" (mem), "m" (*mem)				      \
++		       : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem))	      \
++		       :						      \
+ 		       : "cr0", "memory");				      \
+      __val;								      \
+   })
Index: scripts/fetch/eglibc/2.10.1/15-fnpatch.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/15-fnpatch.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/15-fnpatch.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,54 @@
+2005-04-12  Andreas Schwab  <schwab@suse.de>
+
+	* posix/fnmatch.c (fnmatch): If conversion to wide character
+	fails fall back to single byte matching.
+
+Index: posix/fnmatch.c
+===================================================================
+--- posix/fnmatch.c.orig	2007-05-18 10:40:34.000000000 +0200
++++ posix/fnmatch.c	2007-05-18 13:21:47.199478000 +0200
+@@ -327,6 +327,7 @@
+ # if HANDLE_MULTIBYTE
+   if (__builtin_expect (MB_CUR_MAX, 1) != 1)
+     {
++      const char *orig_pattern = pattern;
+       mbstate_t ps;
+       size_t n;
+       const char *p;
+@@ -378,10 +379,8 @@
+ 	  wstring = (wchar_t *) alloca ((n + 1) * sizeof (wchar_t));
+ 	  n = mbsrtowcs (wstring, &p, n + 1, &ps);
+ 	  if (__builtin_expect (n == (size_t) -1, 0))
+-	    /* Something wrong.
+-	       XXX Do we have to set `errno' to something which mbsrtows hasn't
+-	       already done?  */
+-	    return -1;
++	    /* Something wrong.  Fall back to single byte matching.  */
++	    goto try_singlebyte;
+ 	  if (p)
+ 	    memset (&ps, '\0', sizeof (ps));
+ 	}
+@@ -389,10 +388,8 @@
+ 	{
+ 	  n = mbsrtowcs (NULL, &string, 0, &ps);
+ 	  if (__builtin_expect (n == (size_t) -1, 0))
+-	    /* Something wrong.
+-	       XXX Do we have to set `errno' to something which mbsrtows hasn't
+-	       already done?  */
+-	    return -1;
++	    /* Something wrong.  Fall back to single byte matching.  */
++	    goto try_singlebyte;
+ 	  wstring = (wchar_t *) alloca ((n + 1) * sizeof (wchar_t));
+ 	  assert (mbsinit (&ps));
+ 	  (void) mbsrtowcs (wstring, &string, n + 1, &ps);
+@@ -400,6 +397,9 @@
+ 
+       return internal_fnwmatch (wpattern, wstring, wstring + n,
+ 				flags & FNM_PERIOD, flags, NULL);
++
++    try_singlebyte:
++      pattern = orig_pattern;
+     }
+ # endif  /* mbstate_t and mbsrtowcs or _LIBC.  */
+ 
+
Index: scripts/fetch/eglibc/2.10.1/20-missing_header.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/20-missing_header.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/20-missing_header.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,17 @@
+many ports hit this warning:
+../sysdeps/unix/sysv/linux/check_native.c:46: warning: implicit declaration of function 'memset'
+../sysdeps/unix/sysv/linux/check_native.c:46: warning: implicit declaration of function 'memset'
+
+snipped from suse
+
+--- sysdeps/unix/sysv/linux/check_native.c
++++ sysdeps/unix/sysv/linux/check_native.c
+@@ -23,6 +23,7 @@
+ #include <stddef.h>
+ #include <stdint.h>
+ #include <stdlib.h>
++#include <string.h>
+ #include <time.h>
+ #include <unistd.h>
+ #include <net/if.h>
+
Index: scripts/fetch/eglibc/2.10.1/25-ldbl-nexttowardf.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/25-ldbl-nexttowardf.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/25-ldbl-nexttowardf.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,65 @@
+this change was made to generic __nexttowardf, but not the long double version
+
+2008-05-05  Aurelien Jarno  <aurelien@aurel32.net>
+
+	* sysdeps/ieee754/ldbl-128/s_nexttowardf.c: Include float.h.
+	(__nexttowardf): Use math_opt_barrier and
+	math_force_eval macros.  If FLT_EVAL_METHOD is not 0, force
+	x to float using asm.
+
+---
+ sysdeps/ieee754/ldbl-128/s_nexttowardf.c |   26 ++++++++++++++++----------
+ 1 file changed, 16 insertions(+), 10 deletions(-)
+
+--- a/sysdeps/ieee754/ldbl-128/s_nexttowardf.c
++++ b/sysdeps/ieee754/ldbl-128/s_nexttowardf.c
+@@ -19,7 +19,8 @@
+ #endif
+ 
+ #include "math.h"
+-#include "math_private.h"
++#include <math_private.h>
++#include <float.h>
+ 
+ #ifdef __STDC__
+ 	float __nexttowardf(float x, long double y)
+@@ -44,10 +45,12 @@
+ 	   return x+y;
+ 	if((long double) x==y) return y;	/* x=y, return y */
+ 	if(ix==0) {				/* x == 0 */
+-	    float x2;
++	    float u;
+ 	    SET_FLOAT_WORD(x,(u_int32_t)((hy>>32)&0x80000000)|1);/* return +-minsub*/
+-	    x2 = x*x;
+-	    if(x2==x) return x2; else return x;	/* raise underflow flag */
++	    u = math_opt_barrier (x);
++	    u = u * u;
++	    math_force_eval (u);		/* raise underflow flag */
++	    return x;
+ 	}
+ 	if(hx>=0) {				/* x > 0 */
+ 	    if(hy<0||(ix>>23)>(iy>>48)-0x3f80
+@@ -67,13 +70,16 @@
+ 	    }
+ 	}
+ 	hy = hx&0x7f800000;
+-	if(hy>=0x7f800000) return x+x;	/* overflow  */
++	if(hy>=0x7f800000) {
++	  x = x+x;	/* overflow  */
++	  if (FLT_EVAL_METHOD != 0)
++	    /* Force conversion to float.  */
++	    asm ("" : "+m"(x));
++	  return x;
++	}
+ 	if(hy<0x00800000) {		/* underflow */
+-	    float x2 = x*x;
+-	    if(x2!=x) {		/* raise underflow flag */
+-	        SET_FLOAT_WORD(x2,hx);
+-		return x2;
+-	    }
++	    float u = x*x;
++	    math_force_eval (u);	/* raise underflow flag */
+ 	}
+ 	SET_FLOAT_WORD(x,hx);
+ 	return x;
+
Index: scripts/fetch/eglibc/2.10.1/30-fadvise64_64.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/30-fadvise64_64.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/30-fadvise64_64.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,26 @@
+ sysdeps/unix/sysv/linux/posix_fadvise.c |   13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/sysdeps/unix/sysv/linux/posix_fadvise.c
++++ b/sysdeps/unix/sysv/linux/posix_fadvise.c
+@@ -35,6 +35,19 @@
+     return INTERNAL_SYSCALL_ERRNO (ret, err);
+   return 0;
+ #else
++# ifdef __NR_fadvise64_64
++  INTERNAL_SYSCALL_DECL (err);  
++  int ret = INTERNAL_SYSCALL (fadvise64_64, err, 6, fd,
++			      __LONG_LONG_PAIR ((long) (offset >> 31),
++						(long) offset),
++			      __LONG_LONG_PAIR ((long) (len >> 31),
++						(long) len),
++			      advise);
++  if (INTERNAL_SYSCALL_ERROR_P (ret, err))
++    return INTERNAL_SYSCALL_ERRNO (ret, err);
++  return 0;
++# else
+   return ENOSYS;
++# endif
+ #endif
+ }
+
Index: scripts/fetch/eglibc/2.10.1/35-dynamic_resolv.patch
===================================================================
--- scripts/fetch/eglibc/2.10.1/35-dynamic_resolv.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
+++ scripts/fetch/eglibc/2.10.1/35-dynamic_resolv.patch	(revision b17b911f87d3b42ec9506b49f2da78f81111da6e)
@@ -0,0 +1,37 @@
+if /etc/resolv.conf is updated, then make sure applications
+already running get the updated information.
+
+http://bugs.gentoo.org/177416
+
+--- libc/resolv/res_libc.c
++++ libc/resolv/res_libc.c
+@@ -22,6 +22,7 @@
+ #include <arpa/nameser.h>
+ #include <resolv.h>
+ #include <bits/libc-lock.h>
++#include <sys/stat.h>
+ 
+ 
+ /* The following bit is copied from res_data.c (where it is #ifdef'ed
+@@ -101,6 +102,20 @@
+ __res_maybe_init (res_state resp, int preinit)
+ {
+ 	if (resp->options & RES_INIT) {
++		static time_t last_mtime, last_check;
++		time_t now;
++		struct stat statbuf;
++		
++		time (&now);
++		if (now != last_check) {
++			last_check = now;
++			if (stat (_PATH_RESCONF, &statbuf) == 0 && last_mtime != statbuf.st_mtime) {
++				last_mtime = statbuf.st_mtime;
++				atomicinclock (lock);
++				atomicinc (__res_initstamp);
++				atomicincunlock (lock);
++			}
++		}
+ 		if (__res_initstamp != resp->_u._ext.initstamp) {
+ 			if (resp->nscount > 0) {
+ 				__res_nclose (resp);
+
