Changeset 8bb5996 for patches


Ignore:
Timestamp:
Aug 20, 2006, 11:13:54 PM (18 years ago)
Author:
Jim Gifford <clfs@…>
Branches:
clfs-1.2, clfs-2.1, clfs-3.0.0-systemd, clfs-3.0.0-sysvinit, master, systemd, sysvinit
Children:
04899b7
Parents:
5965ca5
Message:

Updated Linux Patches

Location:
patches
Files:
1 added
3 moved

Legend:

Unmodified
Added
Removed

  • patches/linux-2.6.17.9-mips_fixes-1.patch

    r5965ca5 r8bb5996  
    11Submitted By: Jim Gifford (patches at jg555 dot com)
    2 Date: 2006-07-08
     2Date: 2006-08-14
    33Initial Package Version: 2.6.17.4
    44Origin: Linux-MIPS Mailing List
    … …  
    99        1 - iomap for MIPS - iomap.c io.h
    1010        2 - Cobalt ide fixes
     11        3 - Updates to Support N32 only builds
    1112
    12 diff -Naur linux-2.6.17.4/arch/mips/lib/iomap.c linux-2.6.17.4.kernel/arch/mips/lib/iomap.c
    13 --- linux-2.6.17.4/arch/mips/lib/iomap.c        1969-12-31 16:00:00.000000000 -0800
    14 +++ linux-2.6.17.4.kernel/arch/mips/lib/iomap.c 2006-06-30 10:37:38.000000000 -0700
     13diff -Naur linux-2.6.17.8.orig/arch/mips/kernel/Makefile linux-2.6.17.8/arch/mips/kernel/Makefile
     14--- linux-2.6.17.8.orig/arch/mips/kernel/Makefile       2006-08-06 21:18:54.000000000 -0700
     15+++ linux-2.6.17.8/arch/mips/kernel/Makefile    2006-08-14 08:07:02.196300148 -0700
     16@@ -54,7 +54,7 @@
     17 obj-$(CONFIG_64BIT)            += scall64-64.o
     18 obj-$(CONFIG_BINFMT_IRIX)      += binfmt_irix.o
     19 obj-$(CONFIG_MIPS32_COMPAT)    += linux32.o signal32.o
     20-obj-$(CONFIG_MIPS32_N32)       += binfmt_elfn32.o scall64-n32.o signal_n32.o
     21+obj-$(CONFIG_MIPS32_N32)       += binfmt_elfn32.o scall64-n32.o signal_n32.o ptrace32.o
     22 obj-$(CONFIG_MIPS32_O32)       += binfmt_elfo32.o scall64-o32.o ptrace32.o
     23 
     24 obj-$(CONFIG_KGDB)             += gdb-low.o gdb-stub.o
     25diff -Naur linux-2.6.17.8.orig/arch/mips/lib/Makefile linux-2.6.17.8/arch/mips/lib/Makefile
     26--- linux-2.6.17.8.orig/arch/mips/lib/Makefile  2006-08-14 08:05:04.143414758 -0700
     27+++ linux-2.6.17.8/arch/mips/lib/Makefile       2006-08-14 08:05:27.786793056 -0700
     28@@ -5,6 +5,8 @@
     29 lib-y  += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
     30           strnlen_user.o uncached.o
     31 
     32+obj-y  += iomap.o
     33+
     34 # libgcc-style stuff needed in the kernel
     35 lib-y += ashldi3.o ashrdi3.o lshrdi3.o
     36 
     37diff -Naur linux-2.6.17.8.orig/arch/mips/lib/ashldi3.c linux-2.6.17.8/arch/mips/lib/ashldi3.c
     38--- linux-2.6.17.8.orig/arch/mips/lib/ashldi3.c 1969-12-31 16:00:00.000000000 -0800
     39+++ linux-2.6.17.8/arch/mips/lib/ashldi3.c      2006-08-14 08:05:27.786793056 -0700
     40@@ -0,0 +1,29 @@
     41+#include <linux/module.h>
     42+
     43+#include "libgcc.h"
     44+
     45+long long __ashldi3(long long u, word_type b)
     46+{
     47+       DWunion uu, w;
     48+       word_type bm;
     49+
     50+       if (b == 0)
     51+               return u;
     52+
     53+       uu.ll = u;
     54+       bm = 32 - b;
     55+
     56+       if (bm <= 0) {
     57+               w.s.low = 0;
     58+               w.s.high = (unsigned int) uu.s.low << -bm;
     59+       } else {
     60+               const unsigned int carries = (unsigned int) uu.s.low >> bm;
     61+
     62+               w.s.low = (unsigned int) uu.s.low << b;
     63+               w.s.high = ((unsigned int) uu.s.high << b) | carries;
     64+       }
     65+
     66+       return w.ll;
     67+}
     68+
     69+EXPORT_SYMBOL(__ashldi3);
     70diff -Naur linux-2.6.17.8.orig/arch/mips/lib/ashrdi3.c linux-2.6.17.8/arch/mips/lib/ashrdi3.c
     71--- linux-2.6.17.8.orig/arch/mips/lib/ashrdi3.c 1969-12-31 16:00:00.000000000 -0800
     72+++ linux-2.6.17.8/arch/mips/lib/ashrdi3.c      2006-08-14 08:05:27.786793056 -0700
     73@@ -0,0 +1,31 @@
     74+#include <linux/module.h>
     75+
     76+#include "libgcc.h"
     77+
     78+long long __ashrdi3(long long u, word_type b)
     79+{
     80+       DWunion uu, w;
     81+       word_type bm;
     82+
     83+       if (b == 0)
     84+               return u;
     85+
     86+       uu.ll = u;
     87+       bm = 32 - b;
     88+
     89+       if (bm <= 0) {
     90+               /* w.s.high = 1..1 or 0..0 */
     91+               w.s.high =
     92+                   uu.s.high >> 31;
     93+               w.s.low = uu.s.high >> -bm;
     94+       } else {
     95+               const unsigned int carries = (unsigned int) uu.s.high << bm;
     96+
     97+               w.s.high = uu.s.high >> b;
     98+               w.s.low = ((unsigned int) uu.s.low >> b) | carries;
     99+       }
     100+
     101+       return w.ll;
     102+}
     103+
     104+EXPORT_SYMBOL(__ashrdi3);
     105diff -Naur linux-2.6.17.8.orig/arch/mips/lib/iomap.c linux-2.6.17.8/arch/mips/lib/iomap.c
     106--- linux-2.6.17.8.orig/arch/mips/lib/iomap.c   1969-12-31 16:00:00.000000000 -0800
     107+++ linux-2.6.17.8/arch/mips/lib/iomap.c        2006-08-14 08:05:27.786793056 -0700
    15108@@ -0,0 +1,78 @@
    16109+/*
    … …  
    92185+EXPORT_SYMBOL(pci_iomap);
    93186+EXPORT_SYMBOL(pci_iounmap);
    94 diff -Naur linux-2.6.17.4/arch/mips/lib/Makefile linux-2.6.17.4.kernel/arch/mips/lib/Makefile
    95 --- linux-2.6.17.4/arch/mips/lib/Makefile       2006-07-02 01:53:19.000000000 -0700
    96 +++ linux-2.6.17.4.kernel/arch/mips/lib/Makefile        2006-07-07 12:40:23.000000000 -0700
    97 @@ -5,6 +5,8 @@
    98  lib-y  += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
    99            strnlen_user.o uncached.o
    100  
    101 +obj-y  += iomap.o
    102 +
    103  # libgcc-style stuff needed in the kernel
    104  lib-y += ashldi3.o ashrdi3.o lshrdi3.o
    105  
    106 diff -Naur linux-2.6.17.4/include/asm-mips/io.h linux-2.6.17.4.kernel/include/asm-mips/io.h
    107 --- linux-2.6.17.4/include/asm-mips/io.h        2006-07-02 01:53:19.000000000 -0700
    108 +++ linux-2.6.17.4.kernel/include/asm-mips/io.h 2006-07-07 12:44:03.000000000 -0700
    109 @@ -519,6 +519,34 @@
    110  }
    111  
    112  /*
    113 + * Memory Mapped I/O
    114 + */
    115 +#define ioread8(addr)          readb(addr)
    116 +#define ioread16(addr)         readw(addr)
    117 +#define ioread32(addr)         readl(addr)
    118 +
    119 +#define iowrite8(b,addr)       writeb(b,addr)
    120 +#define iowrite16(w,addr)      writew(w,addr)
    121 +#define iowrite32(l,addr)      writel(l,addr)
    122 +
    123 +#define ioread8_rep(a,b,c)     readsb(a,b,c)
    124 +#define ioread16_rep(a,b,c)    readsw(a,b,c)
    125 +#define ioread32_rep(a,b,c)    readsl(a,b,c)
    126 +
    127 +#define iowrite8_rep(a,b,c)    writesb(a,b,c)
    128 +#define iowrite16_rep(a,b,c)   writesw(a,b,c)
    129 +#define iowrite32_rep(a,b,c)   writesl(a,b,c)
    130 +
    131 +/* Create a virtual mapping cookie for an IO port range */
    132 +extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
    133 +extern void ioport_unmap(void __iomem *);
    134 +
    135 +/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
    136 +struct pci_dev;
    137 +extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
    138 +extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
    139 +
    140 +/*
    141   * ISA space is 'always mapped' on currently supported MIPS systems, no need
    142   * to explicitly ioremap() it. The fact that the ISA IO space is mapped
    143   * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
    144 diff -Naur linux-2.6.17.4/include/asm-mips/mach-cobalt/ide.h linux-2.6.17.4.kernel/include/asm-mips/mach-cobalt/ide.h
    145 --- linux-2.6.17.4/include/asm-mips/mach-cobalt/ide.h   1969-12-31 16:00:00.000000000 -0800
    146 +++ linux-2.6.17.4.kernel/include/asm-mips/mach-cobalt/ide.h    2006-07-07 12:40:46.000000000 -0700
    147 @@ -0,0 +1,83 @@
    148 +
    149 +/*
    150 + * PIO "in" transfers can cause D-cache lines to be allocated
    151 + * to the data being read. If the target is the page cache then
    152 + * the kernel can create a user space mapping of the same page
    153 + * without flushing it from the D-cache. This has large potential
    154 + * to create cache aliases. The Cobalts seem to trigger this
    155 + * problem easily.
    156 + *
    157 + * MIPs doesn't have a flush_dcache_range() so we roll
    158 + * our own.
    159 + *
    160 + * -- pdh
    161 + */
    162 +
    163 +#define MAX_HWIFS                      2
    164 +
    165 +#include <asm/r4kcache.h>
    166 +
    167 +static inline void __flush_dcache(void)
    168 +{
    169 +       unsigned long dc_size, dc_line, addr, end;
    170 +
    171 +       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
    172 +       dc_line = current_cpu_data.dcache.linesz;
    173 +
    174 +       addr = CKSEG0;
    175 +       end = addr + dc_size;
    176 +
    177 +       for (; addr < end; addr += dc_line)
    178 +               flush_dcache_line_indexed(addr);
    179 +}
    180 +
    181 +static inline void __flush_dcache_range(unsigned long start, unsigned long end)
    182 +{
    183 +       unsigned long dc_size, dc_line, addr;
    184 +
    185 +       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
    186 +       dc_line = current_cpu_data.dcache.linesz;
    187 +
    188 +       addr = start & ~(dc_line - 1);
    189 +       end += dc_line - 1;
    190 +
    191 +       if (end - addr < dc_size)
    192 +               for (; addr < end; addr += dc_line)
    193 +                       flush_dcache_line(addr);
    194 +       else
    195 +               __flush_dcache();
    196 +}
    197 +
    198 +static inline void __ide_insw(unsigned long port, void *addr, unsigned int count)
    199 +{
    200 +       insw(port, addr, count);
    201 +
    202 +       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
    203 +}
    204 +
    205 +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
    206 +{
    207 +       insl(port, addr, count);
    208 +
    209 +       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
    210 +}
    211 +
    212 +static inline void __ide_mm_insw(volatile void __iomem *port, void *addr, unsigned int count)
    213 +{
    214 +       readsw(port, addr, count);
    215 +
    216 +       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
    217 +}
    218 +
    219 +static inline void __ide_mm_insl(volatile void __iomem *port, void *addr, unsigned int count)
    220 +{
    221 +       readsl(port, addr, count);
    222 +
    223 +       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
    224 +}
    225 +
    226 +#define insw                   __ide_insw
    227 +#define insl                   __ide_insl
    228 +
    229 +#define __ide_mm_outsw         writesw
    230 +#define __ide_mm_outsl         writesl
    231 diff -Naur linux-2.6.17.4/arch/mips/lib/ashldi3.c linux-2.6.17.4/arch/mips/lib/ashldi3.c
    232 --- linux-2.6.17.4/arch/mips/lib/ashldi3.c      1969-12-31 16:00:00.000000000 -0800
    233 +++ linux-2.6.17.4/arch/mips/lib/ashldi3.c      2006-06-19 18:16:13.000000000 -0700
    234 @@ -0,0 +1,29 @@
    235 +#include <linux/module.h>
    236 +
    237 +#include "libgcc.h"
    238 +
    239 +long long __ashldi3(long long u, word_type b)
    240 +{
    241 +       DWunion uu, w;
    242 +       word_type bm;
    243 +
    244 +       if (b == 0)
    245 +               return u;
    246 +
    247 +       uu.ll = u;
    248 +       bm = 32 - b;
    249 +
    250 +       if (bm <= 0) {
    251 +               w.s.low = 0;
    252 +               w.s.high = (unsigned int) uu.s.low << -bm;
    253 +       } else {
    254 +               const unsigned int carries = (unsigned int) uu.s.low >> bm;
    255 +
    256 +               w.s.low = (unsigned int) uu.s.low << b;
    257 +               w.s.high = ((unsigned int) uu.s.high << b) | carries;
    258 +       }
    259 +
    260 +       return w.ll;
    261 +}
    262 +
    263 +EXPORT_SYMBOL(__ashldi3);
    264 diff -Naur linux-2.6.17.4/arch/mips/lib/ashrdi3.c linux-2.6.17.4/arch/mips/lib/ashrdi3.c
    265 --- linux-2.6.17.4/arch/mips/lib/ashrdi3.c      1969-12-31 16:00:00.000000000 -0800
    266 +++ linux-2.6.17.4/arch/mips/lib/ashrdi3.c      2006-06-19 18:16:13.000000000 -0700
    267 @@ -0,0 +1,31 @@
    268 +#include <linux/module.h>
    269 +
    270 +#include "libgcc.h"
    271 +
    272 +long long __ashrdi3(long long u, word_type b)
    273 +{
    274 +       DWunion uu, w;
    275 +       word_type bm;
    276 +
    277 +       if (b == 0)
    278 +               return u;
    279 +
    280 +       uu.ll = u;
    281 +       bm = 32 - b;
    282 +
    283 +       if (bm <= 0) {
    284 +               /* w.s.high = 1..1 or 0..0 */
    285 +               w.s.high =
    286 +                   uu.s.high >> 31;
    287 +               w.s.low = uu.s.high >> -bm;
    288 +       } else {
    289 +               const unsigned int carries = (unsigned int) uu.s.high << bm;
    290 +
    291 +               w.s.high = uu.s.high >> b;
    292 +               w.s.low = ((unsigned int) uu.s.low >> b) | carries;
    293 +       }
    294 +
    295 +       return w.ll;
    296 +}
    297 +
    298 +EXPORT_SYMBOL(__ashrdi3);
    299 diff -Naur linux-2.6.17.4/arch/mips/lib/libgcc.h linux-2.6.17.4/arch/mips/lib/libgcc.h
    300 --- linux-2.6.17.4/arch/mips/lib/libgcc.h       1969-12-31 16:00:00.000000000 -0800
    301 +++ linux-2.6.17.4/arch/mips/lib/libgcc.h       2006-06-19 18:16:13.000000000 -0700
     187diff -Naur linux-2.6.17.8.orig/arch/mips/lib/libgcc.h linux-2.6.17.8/arch/mips/lib/libgcc.h
     188--- linux-2.6.17.8.orig/arch/mips/lib/libgcc.h  1969-12-31 16:00:00.000000000 -0800
     189+++ linux-2.6.17.8/arch/mips/lib/libgcc.h       2006-08-14 08:05:27.786793056 -0700
    302190@@ -0,0 +1,26 @@
    303191+#ifndef __ASM_LIBGCC_H
    … …  
    327215+
    328216+#endif /* __ASM_LIBGCC_H */
    329 diff -Naur linux-2.6.17.4/arch/mips/lib/lshrdi3.c linux-2.6.17.4/arch/mips/lib/lshrdi3.c
    330 --- linux-2.6.17.4/arch/mips/lib/lshrdi3.c      1969-12-31 16:00:00.000000000 -0800
    331 +++ linux-2.6.17.4/arch/mips/lib/lshrdi3.c      2006-06-19 18:16:13.000000000 -0700
     217diff -Naur linux-2.6.17.8.orig/arch/mips/lib/lshrdi3.c linux-2.6.17.8/arch/mips/lib/lshrdi3.c
     218--- linux-2.6.17.8.orig/arch/mips/lib/lshrdi3.c 1969-12-31 16:00:00.000000000 -0800
     219+++ linux-2.6.17.8/arch/mips/lib/lshrdi3.c      2006-08-14 08:05:27.786793056 -0700
    332220@@ -0,0 +1,29 @@
    333221+#include <linux/module.h>
    … …  
    360248+
    361249+EXPORT_SYMBOL(__lshrdi3);
     250diff -Naur linux-2.6.17.8.orig/include/asm-mips/io.h linux-2.6.17.8/include/asm-mips/io.h
     251--- linux-2.6.17.8.orig/include/asm-mips/io.h   2006-08-14 08:05:04.311410340 -0700
     252+++ linux-2.6.17.8/include/asm-mips/io.h        2006-08-14 08:05:27.786793056 -0700
     253@@ -519,6 +519,34 @@
     254 }
     255 
     256 /*
     257+ * Memory Mapped I/O
     258+ */
     259+#define ioread8(addr)          readb(addr)
     260+#define ioread16(addr)         readw(addr)
     261+#define ioread32(addr)         readl(addr)
     262+
     263+#define iowrite8(b,addr)       writeb(b,addr)
     264+#define iowrite16(w,addr)      writew(w,addr)
     265+#define iowrite32(l,addr)      writel(l,addr)
     266+
     267+#define ioread8_rep(a,b,c)     readsb(a,b,c)
     268+#define ioread16_rep(a,b,c)    readsw(a,b,c)
     269+#define ioread32_rep(a,b,c)    readsl(a,b,c)
     270+
     271+#define iowrite8_rep(a,b,c)    writesb(a,b,c)
     272+#define iowrite16_rep(a,b,c)   writesw(a,b,c)
     273+#define iowrite32_rep(a,b,c)   writesl(a,b,c)
     274+
     275+/* Create a virtual mapping cookie for an IO port range */
     276+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
     277+extern void ioport_unmap(void __iomem *);
     278+
     279+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
     280+struct pci_dev;
     281+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
     282+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
     283+
     284+/*
     285  * ISA space is 'always mapped' on currently supported MIPS systems, no need
     286  * to explicitly ioremap() it. The fact that the ISA IO space is mapped
     287  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
     288diff -Naur linux-2.6.17.8.orig/include/asm-mips/mach-cobalt/ide.h linux-2.6.17.8/include/asm-mips/mach-cobalt/ide.h
     289--- linux-2.6.17.8.orig/include/asm-mips/mach-cobalt/ide.h      1969-12-31 16:00:00.000000000 -0800
     290+++ linux-2.6.17.8/include/asm-mips/mach-cobalt/ide.h   2006-08-14 08:05:27.786793056 -0700
     291@@ -0,0 +1,83 @@
     292+
     293+/*
     294+ * PIO "in" transfers can cause D-cache lines to be allocated
     295+ * to the data being read. If the target is the page cache then
     296+ * the kernel can create a user space mapping of the same page
     297+ * without flushing it from the D-cache. This has large potential
     298+ * to create cache aliases. The Cobalts seem to trigger this
     299+ * problem easily.
     300+ *
     301+ * MIPs doesn't have a flush_dcache_range() so we roll
     302+ * our own.
     303+ *
     304+ * -- pdh
     305+ */
     306+
     307+#define MAX_HWIFS                      2
     308+
     309+#include <asm/r4kcache.h>
     310+
     311+static inline void __flush_dcache(void)
     312+{
     313+       unsigned long dc_size, dc_line, addr, end;
     314+
     315+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
     316+       dc_line = current_cpu_data.dcache.linesz;
     317+
     318+       addr = CKSEG0;
     319+       end = addr + dc_size;
     320+
     321+       for (; addr < end; addr += dc_line)
     322+               flush_dcache_line_indexed(addr);
     323+}
     324+
     325+static inline void __flush_dcache_range(unsigned long start, unsigned long end)
     326+{
     327+       unsigned long dc_size, dc_line, addr;
     328+
     329+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
     330+       dc_line = current_cpu_data.dcache.linesz;
     331+
     332+       addr = start & ~(dc_line - 1);
     333+       end += dc_line - 1;
     334+
     335+       if (end - addr < dc_size)
     336+               for (; addr < end; addr += dc_line)
     337+                       flush_dcache_line(addr);
     338+       else
     339+               __flush_dcache();
     340+}
     341+
     342+static inline void __ide_insw(unsigned long port, void *addr, unsigned int count)
     343+{
     344+       insw(port, addr, count);
     345+
     346+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
     347+}
     348+
     349+static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
     350+{
     351+       insl(port, addr, count);
     352+
     353+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
     354+}
     355+
     356+static inline void __ide_mm_insw(volatile void __iomem *port, void *addr, unsigned int count)
     357+{
     358+       readsw(port, addr, count);
     359+
     360+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
     361+}
     362+
     363+static inline void __ide_mm_insl(volatile void __iomem *port, void *addr, unsigned int count)
     364+{
     365+       readsl(port, addr, count);
     366+
     367+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
     368+}
     369+
     370+#define insw                   __ide_insw
     371+#define insl                   __ide_insl
     372+
     373+#define __ide_mm_outsw         writesw
     374+#define __ide_mm_outsl         writesl
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