source:
scripts/patch/gcc/4.4.1/35-boemhm-ppc.patch@
3b665a0
Last change on this file since 3b665a0 was 29f6db3, checked in by , 15 years ago | |
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File size: 3.5 KB |
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trunk/boehm-gc/include/private/gc_locks.h
Fixes In file included from /var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_priv.h:98, from /var/build_system/work/gcc-4.4.1/boehm-gc/alloc.c:19: /var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_locks.h: In function âGC_test_and_setâ: /var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_locks.h:165: error: âasmâ operand has impossible constraints make[3]: *** [alloc.lo] Error 1 make[3]: Leaving directory `/var/build_system/work/gcc-build/powerpc-unknown-linux-gnu/boehm-gc' make[2]: *** [all-recursive] Error 1
139 139 # define GC_TEST_AND_SET_DEFINED 140 140 # endif 141 141 # if defined(POWERPC) 142 # if 0 /* CPP_WORDSZ == 64 totally broken to use int locks with ldarx */ 143 inline static int GC_test_and_set(volatile unsigned int *addr) { 144 unsigned long oldval; 145 unsigned long temp = 1; /* locked value */ 146 147 __asm__ __volatile__( 148 "1:\tldarx %0,0,%3\n" /* load and reserve */ 149 "\tcmpdi %0, 0\n" /* if load is */ 150 "\tbne 2f\n" /* non-zero, return already set */ 151 "\tstdcx. %2,0,%1\n" /* else store conditional */ 152 "\tbne- 1b\n" /* retry if lost reservation */ 153 "\tsync\n" /* import barrier */ 154 "2:\t\n" /* oldval is zero if we set */ 155 : "=&r"(oldval), "=p"(addr) 156 : "r"(temp), "1"(addr) 157 : "cr0","memory"); 158 return (int)oldval; 159 } 142 # define GC_TEST_AND_SET_DEFINED 143 # define GC_CLEAR_DEFINED 144 # if (__GNUC__>4)||((__GNUC__==4)&&(__GNUC_MINOR__>=4)) 145 # define GC_test_and_set(addr) __sync_lock_test_and_set (addr, 1) 146 # define GC_clear(addr) __sync_lock_release (addr) 160 147 # else 161 148 inline static int GC_test_and_set(volatile unsigned int *addr) { 162 149 int oldval; 163 150 int temp = 1; /* locked value */ 164 151 165 152 __asm__ __volatile__( 166 "1:\tlwarx %0,0,%3\n" /* load and reserve */ 153 "\n1:\n" 154 "\tlwarx %0,%y3\n" /* load and reserve, 32-bits */ 167 155 "\tcmpwi %0, 0\n" /* if load is */ 168 156 "\tbne 2f\n" /* non-zero, return already set */ 169 "\tstwcx. %2, 0,%1\n"/* else store conditional */157 "\tstwcx. %2,%y3\n" /* else store conditional */ 170 158 "\tbne- 1b\n" /* retry if lost reservation */ 171 159 "\tsync\n" /* import barrier */ 172 160 "2:\t\n" /* oldval is zero if we set */ 173 : "=&r"(oldval), "= p"(addr)174 : "r"(temp), " 1"(addr)161 : "=&r"(oldval), "=m"(addr) 162 : "r"(temp), "Z"(addr) 175 163 : "cr0","memory"); 176 164 return oldval; 177 165 } 178 # endif179 # define GC_TEST_AND_SET_DEFINED180 166 inline static void GC_clear(volatile unsigned int *addr) { 181 167 __asm__ __volatile__("lwsync" : : : "memory"); 182 168 *(addr) = 0; 183 169 } 184 # define GC_CLEAR_DEFINED170 # endif 185 171 # endif 186 172 # if defined(ALPHA) 187 173 inline static int GC_test_and_set(volatile unsigned int * addr)
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