source: scripts/patch/gcc/4.4.1/35-boemhm-ppc.patch@ 9dac33a

systemd
Last change on this file since 9dac33a was 29f6db3, checked in by Jim Gifford <clfs@…>, 15 years ago

Added PPC patch. Fixed Patch Fetching Scripts.

  • Property mode set to 100644
File size: 3.5 KB
RevLine 
[29f6db3]1Fixes
2In file included from /var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_priv.h:98,
3 from /var/build_system/work/gcc-4.4.1/boehm-gc/alloc.c:19:
4/var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_locks.h: In function ‘GC_test_and_set’:
5/var/build_system/work/gcc-4.4.1/boehm-gc/include/private/gc_locks.h:165: error: ‘asm’ operand has impossible constraints
6make[3]: *** [alloc.lo] Error 1
7make[3]: Leaving directory `/var/build_system/work/gcc-build/powerpc-unknown-linux-gnu/boehm-gc'
8make[2]: *** [all-recursive] Error 1
9
10--- trunk/boehm-gc/include/private/gc_locks.h 2008/07/23 11:06:42 138078
11+++ trunk/boehm-gc/include/private/gc_locks.h 2009/07/23 16:05:37 150018
12@@ -139,49 +139,35 @@
13 # define GC_TEST_AND_SET_DEFINED
14 # endif
15 # if defined(POWERPC)
16-# if 0 /* CPP_WORDSZ == 64 totally broken to use int locks with ldarx */
17- inline static int GC_test_and_set(volatile unsigned int *addr) {
18- unsigned long oldval;
19- unsigned long temp = 1; /* locked value */
20-
21- __asm__ __volatile__(
22- "1:\tldarx %0,0,%3\n" /* load and reserve */
23- "\tcmpdi %0, 0\n" /* if load is */
24- "\tbne 2f\n" /* non-zero, return already set */
25- "\tstdcx. %2,0,%1\n" /* else store conditional */
26- "\tbne- 1b\n" /* retry if lost reservation */
27- "\tsync\n" /* import barrier */
28- "2:\t\n" /* oldval is zero if we set */
29- : "=&r"(oldval), "=p"(addr)
30- : "r"(temp), "1"(addr)
31- : "cr0","memory");
32- return (int)oldval;
33- }
34+# define GC_TEST_AND_SET_DEFINED
35+# define GC_CLEAR_DEFINED
36+# if (__GNUC__>4)||((__GNUC__==4)&&(__GNUC_MINOR__>=4))
37+# define GC_test_and_set(addr) __sync_lock_test_and_set (addr, 1)
38+# define GC_clear(addr) __sync_lock_release (addr)
39 # else
40 inline static int GC_test_and_set(volatile unsigned int *addr) {
41 int oldval;
42 int temp = 1; /* locked value */
43
44 __asm__ __volatile__(
45- "1:\tlwarx %0,0,%3\n" /* load and reserve */
46+ "\n1:\n"
47+ "\tlwarx %0,%y3\n" /* load and reserve, 32-bits */
48 "\tcmpwi %0, 0\n" /* if load is */
49 "\tbne 2f\n" /* non-zero, return already set */
50- "\tstwcx. %2,0,%1\n" /* else store conditional */
51+ "\tstwcx. %2,%y3\n" /* else store conditional */
52 "\tbne- 1b\n" /* retry if lost reservation */
53 "\tsync\n" /* import barrier */
54 "2:\t\n" /* oldval is zero if we set */
55- : "=&r"(oldval), "=p"(addr)
56- : "r"(temp), "1"(addr)
57+ : "=&r"(oldval), "=m"(addr)
58+ : "r"(temp), "Z"(addr)
59 : "cr0","memory");
60 return oldval;
61 }
62-# endif
63-# define GC_TEST_AND_SET_DEFINED
64 inline static void GC_clear(volatile unsigned int *addr) {
65 __asm__ __volatile__("lwsync" : : : "memory");
66 *(addr) = 0;
67 }
68-# define GC_CLEAR_DEFINED
69+# endif
70 # endif
71 # if defined(ALPHA)
72 inline static int GC_test_and_set(volatile unsigned int * addr)
73
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