source: patches/linux-2.6.19.2-mips_fixes-1.patch @ cab0b17

clfs-1.2clfs-2.1clfs-3.0.0-systemdclfs-3.0.0-sysvinitsystemdsysvinit
Last change on this file since cab0b17 was cab0b17, checked in by Jim Gifford <clfs@…>, 17 years ago

Update to Linux 2.6.19.2

  • Property mode set to 100644
File size: 8.2 KB
RevLine 
[60d7c102]1Submitted By: Jim Gifford (patches at jg555 dot com)
[e89ec63]2Date: 2006-11-29
3Initial Package Version: 2.6.19
[60d7c102]4Origin: Linux-MIPS Mailing List
5Upstream Status: Not Applied
6Description: These are patches that have not been accepted by
[e89ec63]7             Linux-MIPS.
[60d7c102]8
[e89ec63]9        1 - iomap for MIPS - iomap.c io.h
10        2 - Cobalt ide fixes
11        3 - Updates to Support N32 only builds
[60d7c102]12
[e89ec63]13diff -Naur linux-2.6.19.orig/arch/mips/kernel/Makefile linux-2.6.19/arch/mips/kernel/Makefile
14--- linux-2.6.19.orig/arch/mips/kernel/Makefile 2006-11-29 13:57:37.000000000 -0800
15+++ linux-2.6.19/arch/mips/kernel/Makefile      2006-11-29 20:06:07.000000000 -0800
16@@ -57,7 +57,7 @@
[60d7c102]17 obj-$(CONFIG_64BIT)            += scall64-64.o
18 obj-$(CONFIG_BINFMT_IRIX)      += binfmt_irix.o
19 obj-$(CONFIG_MIPS32_COMPAT)    += linux32.o signal32.o
20-obj-$(CONFIG_MIPS32_N32)       += binfmt_elfn32.o scall64-n32.o signal_n32.o
21+obj-$(CONFIG_MIPS32_N32)       += binfmt_elfn32.o scall64-n32.o signal_n32.o ptrace32.o
22 obj-$(CONFIG_MIPS32_O32)       += binfmt_elfo32.o scall64-o32.o ptrace32.o
23 
24 obj-$(CONFIG_KGDB)             += gdb-low.o gdb-stub.o
[e89ec63]25diff -Naur linux-2.6.19.orig/arch/mips/lib/Makefile linux-2.6.19/arch/mips/lib/Makefile
26--- linux-2.6.19.orig/arch/mips/lib/Makefile    2006-11-29 20:05:48.000000000 -0800
27+++ linux-2.6.19/arch/mips/lib/Makefile 2006-11-29 20:06:07.000000000 -0800
[60d7c102]28@@ -5,6 +5,8 @@
29 lib-y  += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
30           strnlen_user.o uncached.o
31 
32+obj-y  += iomap.o
33+
34 # libgcc-style stuff needed in the kernel
35 lib-y += ashldi3.o ashrdi3.o lshrdi3.o
36 
[e89ec63]37diff -Naur linux-2.6.19.orig/arch/mips/lib/iomap.c linux-2.6.19/arch/mips/lib/iomap.c
38--- linux-2.6.19.orig/arch/mips/lib/iomap.c     1969-12-31 16:00:00.000000000 -0800
39+++ linux-2.6.19/arch/mips/lib/iomap.c  2006-11-29 20:06:07.000000000 -0800
[60d7c102]40@@ -0,0 +1,78 @@
41+/*
42+ *  iomap.c, Memory Mapped I/O routines for MIPS architecture.
43+ *
44+ *  This code is based on lib/iomap.c, by Linus Torvalds.
45+ *
46+ *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
47+ *
48+ *  This program is free software; you can redistribute it and/or modify
49+ *  it under the terms of the GNU General Public License as published by
50+ *  the Free Software Foundation; either version 2 of the License, or
51+ *  (at your option) any later version.
52+ *
53+ *  This program is distributed in the hope that it will be useful,
54+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
55+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
56+ *  GNU General Public License for more details.
57+ *
58+ *  You should have received a copy of the GNU General Public License
59+ *  along with this program; if not, write to the Free Software
60+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
61+ */
62+#include <linux/ioport.h>
63+#include <linux/module.h>
64+#include <linux/pci.h>
65+
66+#include <asm/io.h>
67+
68+void __iomem *ioport_map(unsigned long port, unsigned int nr)
69+{
70+       unsigned long end;
71+
72+       end = port + nr - 1UL;
73+       if (ioport_resource.start > port ||
74+           ioport_resource.end < end || port > end)
75+               return NULL;
76+
77+       return (void __iomem *)(mips_io_port_base + port);
78+}
79+
80+void ioport_unmap(void __iomem *addr)
81+{
82+}
83+EXPORT_SYMBOL(ioport_map);
84+EXPORT_SYMBOL(ioport_unmap);
85+
86+void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
87+{
88+       unsigned long start, len, flags;
89+
90+       if (dev == NULL)
91+               return NULL;
92+
93+       start = pci_resource_start(dev, bar);
94+       len = pci_resource_len(dev, bar);
95+       if (!start || !len)
96+               return NULL;
97+
98+       if (maxlen != 0 && len > maxlen)
99+               len = maxlen;
100+
101+       flags = pci_resource_flags(dev, bar);
102+       if (flags & IORESOURCE_IO)
103+               return ioport_map(start, len);
104+       if (flags & IORESOURCE_MEM) {
105+               if (flags & IORESOURCE_CACHEABLE)
106+                       return ioremap_cachable(start, len);
107+               return ioremap_nocache(start, len);
108+       }
109+
110+       return NULL;
111+}
112+
113+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
114+{
115+       iounmap(addr);
116+}
117+EXPORT_SYMBOL(pci_iomap);
118+EXPORT_SYMBOL(pci_iounmap);
[e89ec63]119diff -Naur linux-2.6.19.orig/include/asm-mips/io.h linux-2.6.19/include/asm-mips/io.h
120--- linux-2.6.19.orig/include/asm-mips/io.h     2006-11-29 20:05:48.000000000 -0800
121+++ linux-2.6.19/include/asm-mips/io.h  2006-11-29 20:06:07.000000000 -0800
[60d7c102]122@@ -518,6 +518,34 @@
123 }
124 
125 /*
126+ * Memory Mapped I/O
127+ */
128+#define ioread8(addr)          readb(addr)
129+#define ioread16(addr)         readw(addr)
130+#define ioread32(addr)         readl(addr)
131+
132+#define iowrite8(b,addr)       writeb(b,addr)
133+#define iowrite16(w,addr)      writew(w,addr)
134+#define iowrite32(l,addr)      writel(l,addr)
135+
136+#define ioread8_rep(a,b,c)     readsb(a,b,c)
137+#define ioread16_rep(a,b,c)    readsw(a,b,c)
138+#define ioread32_rep(a,b,c)    readsl(a,b,c)
139+
140+#define iowrite8_rep(a,b,c)    writesb(a,b,c)
141+#define iowrite16_rep(a,b,c)   writesw(a,b,c)
142+#define iowrite32_rep(a,b,c)   writesl(a,b,c)
143+
144+/* Create a virtual mapping cookie for an IO port range */
145+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
146+extern void ioport_unmap(void __iomem *);
147+
148+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
149+struct pci_dev;
150+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
151+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
152+
153+/*
154  * ISA space is 'always mapped' on currently supported MIPS systems, no need
155  * to explicitly ioremap() it. The fact that the ISA IO space is mapped
156  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
[e89ec63]157diff -Naur linux-2.6.19.orig/include/asm-mips/mach-cobalt/ide.h linux-2.6.19/include/asm-mips/mach-cobalt/ide.h
158--- linux-2.6.19.orig/include/asm-mips/mach-cobalt/ide.h        1969-12-31 16:00:00.000000000 -0800
159+++ linux-2.6.19/include/asm-mips/mach-cobalt/ide.h     2006-11-29 20:06:07.000000000 -0800
[60d7c102]160@@ -0,0 +1,83 @@
161+
162+/*
163+ * PIO "in" transfers can cause D-cache lines to be allocated
164+ * to the data being read. If the target is the page cache then
165+ * the kernel can create a user space mapping of the same page
166+ * without flushing it from the D-cache. This has large potential
167+ * to create cache aliases. The Cobalts seem to trigger this
168+ * problem easily.
169+ *
170+ * MIPs doesn't have a flush_dcache_range() so we roll
171+ * our own.
172+ *
173+ * -- pdh
174+ */
175+
176+#define MAX_HWIFS                      2
177+
178+#include <asm/r4kcache.h>
179+
180+static inline void __flush_dcache(void)
181+{
182+       unsigned long dc_size, dc_line, addr, end;
183+
184+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
185+       dc_line = current_cpu_data.dcache.linesz;
186+
187+       addr = CKSEG0;
188+       end = addr + dc_size;
189+
190+       for (; addr < end; addr += dc_line)
191+               flush_dcache_line_indexed(addr);
192+}
193+
194+static inline void __flush_dcache_range(unsigned long start, unsigned long end)
195+{
196+       unsigned long dc_size, dc_line, addr;
197+
198+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
199+       dc_line = current_cpu_data.dcache.linesz;
200+
201+       addr = start & ~(dc_line - 1);
202+       end += dc_line - 1;
203+
204+       if (end - addr < dc_size)
205+               for (; addr < end; addr += dc_line)
206+                       flush_dcache_line(addr);
207+       else
208+               __flush_dcache();
209+}
210+
211+static inline void __ide_insw(unsigned long port, void *addr, unsigned int count)
212+{
213+       insw(port, addr, count);
214+
215+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
216+}
217+
218+static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
219+{
220+       insl(port, addr, count);
221+
222+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
223+}
224+
225+static inline void __ide_mm_insw(volatile void __iomem *port, void *addr, unsigned int count)
226+{
227+       readsw(port, addr, count);
228+
229+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
230+}
231+
232+static inline void __ide_mm_insl(volatile void __iomem *port, void *addr, unsigned int count)
233+{
234+       readsl(port, addr, count);
235+
236+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
237+}
238+
239+#define insw                   __ide_insw
240+#define insl                   __ide_insl
241+
242+#define __ide_mm_outsw         writesw
243+#define __ide_mm_outsl         writesl
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