source: patches/linux-2.6.18.2-mips_fixes-1.patch@ ad4134f

clfs-1.2 clfs-2.1 clfs-3.0.0-systemd clfs-3.0.0-sysvinit systemd sysvinit
Last change on this file since ad4134f was d15a80a, checked in by Jim Gifford <clfs@…>, 18 years ago

Linux 2.6.18.2 patches

  • Property mode set to 100644
File size: 8.3 KB
  • arch/mips/kernel/Makefile

    Submitted By: Jim Gifford (patches at jg555 dot com)
    Date: 2006-10-22
    Initial Package Version: 2.6.18.1
    Origin: Linux-MIPS Mailing List
    Upstream Status: Not Applied
    Description: These are patches that have not been accepted by
    	     Linux-MIPS.
    
    	1 - iomap for MIPS - iomap.c io.h
    	2 - Cobalt ide fixes
    	3 - Updates to Support N32 only builds
    
    diff -Naur linux-2.6.18.1.orig/arch/mips/kernel/Makefile linux-2.6.18.1/arch/mips/kernel/Makefile
    old new  
    5656obj-$(CONFIG_64BIT)             += scall64-64.o
    5757obj-$(CONFIG_BINFMT_IRIX)       += binfmt_irix.o
    5858obj-$(CONFIG_MIPS32_COMPAT)     += linux32.o signal32.o
    59 obj-$(CONFIG_MIPS32_N32)        += binfmt_elfn32.o scall64-n32.o signal_n32.o
     59obj-$(CONFIG_MIPS32_N32)        += binfmt_elfn32.o scall64-n32.o signal_n32.o ptrace32.o
    6060obj-$(CONFIG_MIPS32_O32)        += binfmt_elfo32.o scall64-o32.o ptrace32.o
    6161
    6262obj-$(CONFIG_KGDB)              += gdb-low.o gdb-stub.o
  • arch/mips/lib/Makefile

    diff -Naur linux-2.6.18.1.orig/arch/mips/lib/Makefile linux-2.6.18.1/arch/mips/lib/Makefile
    old new  
    55lib-y   += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
    66           strnlen_user.o uncached.o
    77
     8obj-y  += iomap.o
     9
    810# libgcc-style stuff needed in the kernel
    911lib-y += ashldi3.o ashrdi3.o lshrdi3.o
    1012
  • arch/mips/lib/iomap.c

    diff -Naur linux-2.6.18.1.orig/arch/mips/lib/iomap.c linux-2.6.18.1/arch/mips/lib/iomap.c
    old new  
     1/*
     2 *  iomap.c, Memory Mapped I/O routines for MIPS architecture.
     3 *
     4 *  This code is based on lib/iomap.c, by Linus Torvalds.
     5 *
     6 *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
     7 *
     8 *  This program is free software; you can redistribute it and/or modify
     9 *  it under the terms of the GNU General Public License as published by
     10 *  the Free Software Foundation; either version 2 of the License, or
     11 *  (at your option) any later version.
     12 *
     13 *  This program is distributed in the hope that it will be useful,
     14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     16 *  GNU General Public License for more details.
     17 *
     18 *  You should have received a copy of the GNU General Public License
     19 *  along with this program; if not, write to the Free Software
     20 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
     21 */
     22#include <linux/ioport.h>
     23#include <linux/module.h>
     24#include <linux/pci.h>
     25
     26#include <asm/io.h>
     27
     28void __iomem *ioport_map(unsigned long port, unsigned int nr)
     29{
     30       unsigned long end;
     31
     32       end = port + nr - 1UL;
     33       if (ioport_resource.start > port ||
     34           ioport_resource.end < end || port > end)
     35               return NULL;
     36
     37       return (void __iomem *)(mips_io_port_base + port);
     38}
     39
     40void ioport_unmap(void __iomem *addr)
     41{
     42}
     43EXPORT_SYMBOL(ioport_map);
     44EXPORT_SYMBOL(ioport_unmap);
     45
     46void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
     47{
     48       unsigned long start, len, flags;
     49
     50       if (dev == NULL)
     51               return NULL;
     52
     53       start = pci_resource_start(dev, bar);
     54       len = pci_resource_len(dev, bar);
     55       if (!start || !len)
     56               return NULL;
     57
     58       if (maxlen != 0 && len > maxlen)
     59               len = maxlen;
     60
     61       flags = pci_resource_flags(dev, bar);
     62       if (flags & IORESOURCE_IO)
     63               return ioport_map(start, len);
     64       if (flags & IORESOURCE_MEM) {
     65               if (flags & IORESOURCE_CACHEABLE)
     66                       return ioremap_cachable(start, len);
     67               return ioremap_nocache(start, len);
     68       }
     69
     70       return NULL;
     71}
     72
     73void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
     74{
     75       iounmap(addr);
     76}
     77EXPORT_SYMBOL(pci_iomap);
     78EXPORT_SYMBOL(pci_iounmap);
  • include/asm-mips/io.h

    diff -Naur linux-2.6.18.1.orig/include/asm-mips/io.h linux-2.6.18.1/include/asm-mips/io.h
    old new  
    518518}
    519519
    520520/*
     521 * Memory Mapped I/O
     522 */
     523#define ioread8(addr)          readb(addr)
     524#define ioread16(addr)         readw(addr)
     525#define ioread32(addr)         readl(addr)
     526
     527#define iowrite8(b,addr)       writeb(b,addr)
     528#define iowrite16(w,addr)      writew(w,addr)
     529#define iowrite32(l,addr)      writel(l,addr)
     530
     531#define ioread8_rep(a,b,c)     readsb(a,b,c)
     532#define ioread16_rep(a,b,c)    readsw(a,b,c)
     533#define ioread32_rep(a,b,c)    readsl(a,b,c)
     534
     535#define iowrite8_rep(a,b,c)    writesb(a,b,c)
     536#define iowrite16_rep(a,b,c)   writesw(a,b,c)
     537#define iowrite32_rep(a,b,c)   writesl(a,b,c)
     538
     539/* Create a virtual mapping cookie for an IO port range */
     540extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
     541extern void ioport_unmap(void __iomem *);
     542
     543/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
     544struct pci_dev;
     545extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
     546extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
     547
     548/*
    521549 * ISA space is 'always mapped' on currently supported MIPS systems, no need
    522550 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
    523551 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  • include/asm-mips/mach-cobalt/ide.h

    diff -Naur linux-2.6.18.1.orig/include/asm-mips/mach-cobalt/ide.h linux-2.6.18.1/include/asm-mips/mach-cobalt/ide.h
    old new  
     1
     2/*
     3 * PIO "in" transfers can cause D-cache lines to be allocated
     4 * to the data being read. If the target is the page cache then
     5 * the kernel can create a user space mapping of the same page
     6 * without flushing it from the D-cache. This has large potential
     7 * to create cache aliases. The Cobalts seem to trigger this
     8 * problem easily.
     9 *
     10 * MIPs doesn't have a flush_dcache_range() so we roll
     11 * our own.
     12 *
     13 * -- pdh
     14 */
     15
     16#define MAX_HWIFS                      2
     17
     18#include <asm/r4kcache.h>
     19
     20static inline void __flush_dcache(void)
     21{
     22       unsigned long dc_size, dc_line, addr, end;
     23
     24       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
     25       dc_line = current_cpu_data.dcache.linesz;
     26
     27       addr = CKSEG0;
     28       end = addr + dc_size;
     29
     30       for (; addr < end; addr += dc_line)
     31               flush_dcache_line_indexed(addr);
     32}
     33
     34static inline void __flush_dcache_range(unsigned long start, unsigned long end)
     35{
     36       unsigned long dc_size, dc_line, addr;
     37
     38       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
     39       dc_line = current_cpu_data.dcache.linesz;
     40
     41       addr = start & ~(dc_line - 1);
     42       end += dc_line - 1;
     43
     44       if (end - addr < dc_size)
     45               for (; addr < end; addr += dc_line)
     46                       flush_dcache_line(addr);
     47       else
     48               __flush_dcache();
     49}
     50
     51static inline void __ide_insw(unsigned long port, void *addr, unsigned int count)
     52{
     53       insw(port, addr, count);
     54
     55       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
     56}
     57
     58static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
     59{
     60       insl(port, addr, count);
     61
     62       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
     63}
     64
     65static inline void __ide_mm_insw(volatile void __iomem *port, void *addr, unsigned int count)
     66{
     67       readsw(port, addr, count);
     68
     69       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
     70}
     71
     72static inline void __ide_mm_insl(volatile void __iomem *port, void *addr, unsigned int count)
     73{
     74       readsl(port, addr, count);
     75
     76       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
     77}
     78
     79#define insw                   __ide_insw
     80#define insl                   __ide_insl
     81
     82#define __ide_mm_outsw         writesw
     83#define __ide_mm_outsl         writesl
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