source: patches/linux-2.6.17.6-mips-1.patch@ adf8e82

clfs-1.2 clfs-2.1 clfs-3.0.0-systemd clfs-3.0.0-sysvinit systemd sysvinit
Last change on this file since adf8e82 was d75f6d0, checked in by Jim Gifford <clfs@…>, 18 years ago

Updates to Patches for 2.6.17.6
  • Property mode set to 100644
File size: 124.9 KB

  • arch/mips/cobalt/console.c 

    Submitted By: Jim Gifford (patches at jg555 dot com)
Date: 2006-07-08
Initial Package Version: 2.6.17.4
Origin: Linux-MIPS
Upstream Status: http://www.linux-mips.org/pub/linux/mips/kernel/v2.6/
Description: Merges Linux-MIPS and Kernel.org Tree's

diff -Naur linux-2.6.17.4-kernel/arch/mips/cobalt/console.c linux-2.6.17.4-mips/arch/mips/cobalt/console.c
    old new  
    4141
    4242        printk("Cobalt: early console registered\n");
    4343}
     44
     45void __init disable_early_printk(void)
     46{
     47        unregister_console(&cons_info);
     48}

  • arch/mips/configs/atlas_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/atlas_defconfig linux-2.6.17.4-mips/arch/mips/configs/atlas_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_MIPS_BONITO64=y

  • arch/mips/configs/bigsur_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/bigsur_defconfig linux-2.6.17.4-mips/arch/mips/configs/bigsur_defconfig
    old new  
    8383CONFIG_GENERIC_FIND_NEXT_BIT=y
    8484CONFIG_GENERIC_HWEIGHT=y
    8585CONFIG_GENERIC_CALIBRATE_DELAY=y
     86CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    8687CONFIG_DMA_COHERENT=y
    8788CONFIG_CPU_BIG_ENDIAN=y
    8889# CONFIG_CPU_LITTLE_ENDIAN is not set

  • arch/mips/configs/capcella_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/capcella_defconfig linux-2.6.17.4-mips/arch/mips/configs/capcella_defconfig
    old new  
    7575CONFIG_GENERIC_FIND_NEXT_BIT=y
    7676CONFIG_GENERIC_HWEIGHT=y
    7777CONFIG_GENERIC_CALIBRATE_DELAY=y
     78CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7879CONFIG_DMA_NONCOHERENT=y
    7980CONFIG_DMA_NEED_PCI_MAP_STATE=y
    8081# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/cobalt_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/cobalt_defconfig linux-2.6.17.4-mips/arch/mips/configs/cobalt_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374CONFIG_I8259=y

  • arch/mips/configs/db1000_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/db1000_defconfig linux-2.6.17.4-mips/arch/mips/configs/db1000_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/db1100_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/db1100_defconfig linux-2.6.17.4-mips/arch/mips/configs/db1100_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/db1200_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/db1200_defconfig linux-2.6.17.4-mips/arch/mips/configs/db1200_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_COHERENT=y
    7172CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/db1500_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/db1500_defconfig linux-2.6.17.4-mips/arch/mips/configs/db1500_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y

  • arch/mips/configs/db1550_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/db1550_defconfig linux-2.6.17.4-mips/arch/mips/configs/db1550_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y

  • arch/mips/configs/ddb5476_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ddb5476_defconfig linux-2.6.17.4-mips/arch/mips/configs/ddb5476_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_I8259=y

  • arch/mips/configs/ddb5477_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ddb5477_defconfig linux-2.6.17.4-mips/arch/mips/configs/ddb5477_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374CONFIG_I8259=y

  • arch/mips/configs/decstation_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/decstation_defconfig linux-2.6.17.4-mips/arch/mips/configs/decstation_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/e55_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/e55_defconfig linux-2.6.17.4-mips/arch/mips/configs/e55_defconfig
    old new  
    7373CONFIG_GENERIC_FIND_NEXT_BIT=y
    7474CONFIG_GENERIC_HWEIGHT=y
    7575CONFIG_GENERIC_CALIBRATE_DELAY=y
     76CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7677CONFIG_DMA_NONCOHERENT=y
    7778CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7879# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/ev64120_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ev64120_defconfig linux-2.6.17.4-mips/arch/mips/configs/ev64120_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ev96100_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ev96100_defconfig linux-2.6.17.4-mips/arch/mips/configs/ev96100_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ip22_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ip22_defconfig linux-2.6.17.4-mips/arch/mips/configs/ip22_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_ARC=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y

  • arch/mips/configs/ip27_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ip27_defconfig linux-2.6.17.4-mips/arch/mips/configs/ip27_defconfig
    old new  
    7373CONFIG_GENERIC_FIND_NEXT_BIT=y
    7474CONFIG_GENERIC_HWEIGHT=y
    7575CONFIG_GENERIC_CALIBRATE_DELAY=y
     76CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7677CONFIG_ARC=y
    7778CONFIG_DMA_IP27=y
    7879CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ip32_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ip32_defconfig linux-2.6.17.4-mips/arch/mips/configs/ip32_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_ARC=y
    7172CONFIG_DMA_IP32=y
    7273CONFIG_DMA_NONCOHERENT=y

  • arch/mips/configs/it8172_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/it8172_defconfig linux-2.6.17.4-mips/arch/mips/configs/it8172_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/ivr_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ivr_defconfig linux-2.6.17.4-mips/arch/mips/configs/ivr_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/jaguar-atx_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/jaguar-atx_defconfig linux-2.6.17.4-mips/arch/mips/configs/jaguar-atx_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7374CONFIG_LIMITED_DMA=y

  • arch/mips/configs/jmr3927_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/jmr3927_defconfig linux-2.6.17.4-mips/arch/mips/configs/jmr3927_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/lasat200_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/lasat200_defconfig linux-2.6.17.4-mips/arch/mips/configs/lasat200_defconfig
    old new  
    7171CONFIG_GENERIC_FIND_NEXT_BIT=y
    7272CONFIG_GENERIC_HWEIGHT=y
    7373CONFIG_GENERIC_CALIBRATE_DELAY=y
     74CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7475CONFIG_DMA_NONCOHERENT=y
    7576CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7677CONFIG_MIPS_NILE4=y

  • arch/mips/configs/malta_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/malta_defconfig linux-2.6.17.4-mips/arch/mips/configs/malta_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_ARCH_MAY_HAVE_PC_FDC=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y

  • arch/mips/configs/mipssim_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/mipssim_defconfig linux-2.6.17.4-mips/arch/mips/configs/mipssim_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/mpc30x_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/mpc30x_defconfig linux-2.6.17.4-mips/arch/mips/configs/mpc30x_defconfig
    old new  
    7575CONFIG_GENERIC_FIND_NEXT_BIT=y
    7676CONFIG_GENERIC_HWEIGHT=y
    7777CONFIG_GENERIC_CALIBRATE_DELAY=y
     78CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7879CONFIG_DMA_NONCOHERENT=y
    7980CONFIG_DMA_NEED_PCI_MAP_STATE=y
    8081# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/ocelot_3_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ocelot_3_defconfig linux-2.6.17.4-mips/arch/mips/configs/ocelot_3_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ocelot_c_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ocelot_c_defconfig linux-2.6.17.4-mips/arch/mips/configs/ocelot_c_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ocelot_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ocelot_defconfig linux-2.6.17.4-mips/arch/mips/configs/ocelot_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/ocelot_g_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/ocelot_g_defconfig linux-2.6.17.4-mips/arch/mips/configs/ocelot_g_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_CPU_BIG_ENDIAN=y

  • arch/mips/configs/pb1100_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/pb1100_defconfig linux-2.6.17.4-mips/arch/mips/configs/pb1100_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/pb1500_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/pb1500_defconfig linux-2.6.17.4-mips/arch/mips/configs/pb1500_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/pb1550_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/pb1550_defconfig linux-2.6.17.4-mips/arch/mips/configs/pb1550_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y

  • arch/mips/configs/pnx8550-jbs_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/pnx8550-jbs_defconfig linux-2.6.17.4-mips/arch/mips/configs/pnx8550-jbs_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/pnx8550-v2pci_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/pnx8550-v2pci_defconfig linux-2.6.17.4-mips/arch/mips/configs/pnx8550-v2pci_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/qemu_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/qemu_defconfig linux-2.6.17.4-mips/arch/mips/configs/qemu_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_COHERENT=y
    7172CONFIG_GENERIC_ISA_DMA=y
    7273CONFIG_I8259=y

  • arch/mips/configs/rbhma4500_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/rbhma4500_defconfig linux-2.6.17.4-mips/arch/mips/configs/rbhma4500_defconfig
    old new  
    7474CONFIG_GENERIC_FIND_NEXT_BIT=y
    7575CONFIG_GENERIC_HWEIGHT=y
    7676CONFIG_GENERIC_CALIBRATE_DELAY=y
     77CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7778CONFIG_DMA_NONCOHERENT=y
    7879CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7980CONFIG_GENERIC_ISA_DMA=y

  • arch/mips/configs/rm200_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/rm200_defconfig linux-2.6.17.4-mips/arch/mips/configs/rm200_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_ARC=y
    7172CONFIG_ARCH_MAY_HAVE_PC_FDC=y
    7273CONFIG_DMA_NONCOHERENT=y

  • arch/mips/configs/sb1250-swarm_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/sb1250-swarm_defconfig linux-2.6.17.4-mips/arch/mips/configs/sb1250-swarm_defconfig
    old new  
    8484CONFIG_GENERIC_FIND_NEXT_BIT=y
    8585CONFIG_GENERIC_HWEIGHT=y
    8686CONFIG_GENERIC_CALIBRATE_DELAY=y
     87CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    8788CONFIG_DMA_COHERENT=y
    8889CONFIG_CPU_BIG_ENDIAN=y
    8990# CONFIG_CPU_LITTLE_ENDIAN is not set

  • arch/mips/configs/sead_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/sead_defconfig linux-2.6.17.4-mips/arch/mips/configs/sead_defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_DMA_NONCOHERENT=y
    7172CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7273# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/tb0226_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/tb0226_defconfig linux-2.6.17.4-mips/arch/mips/configs/tb0226_defconfig
    old new  
    7777CONFIG_GENERIC_FIND_NEXT_BIT=y
    7878CONFIG_GENERIC_HWEIGHT=y
    7979CONFIG_GENERIC_CALIBRATE_DELAY=y
     80CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    8081CONFIG_DMA_NONCOHERENT=y
    8182CONFIG_DMA_NEED_PCI_MAP_STATE=y
    8283# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/tb0229_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/tb0229_defconfig linux-2.6.17.4-mips/arch/mips/configs/tb0229_defconfig
    old new  
    7777CONFIG_GENERIC_FIND_NEXT_BIT=y
    7878CONFIG_GENERIC_HWEIGHT=y
    7979CONFIG_GENERIC_CALIBRATE_DELAY=y
     80CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    8081CONFIG_DMA_NONCOHERENT=y
    8182CONFIG_DMA_NEED_PCI_MAP_STATE=y
    8283# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/workpad_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/workpad_defconfig linux-2.6.17.4-mips/arch/mips/configs/workpad_defconfig
    old new  
    7373CONFIG_GENERIC_FIND_NEXT_BIT=y
    7474CONFIG_GENERIC_HWEIGHT=y
    7575CONFIG_GENERIC_CALIBRATE_DELAY=y
     76CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7677CONFIG_DMA_NONCOHERENT=y
    7778CONFIG_DMA_NEED_PCI_MAP_STATE=y
    7879# CONFIG_CPU_BIG_ENDIAN is not set

  • arch/mips/configs/yosemite_defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/configs/yosemite_defconfig linux-2.6.17.4-mips/arch/mips/configs/yosemite_defconfig
    old new  
    6868CONFIG_GENERIC_FIND_NEXT_BIT=y
    6969CONFIG_GENERIC_HWEIGHT=y
    7070CONFIG_GENERIC_CALIBRATE_DELAY=y
     71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7172CONFIG_DMA_COHERENT=y
    7273CONFIG_CPU_BIG_ENDIAN=y
    7374# CONFIG_CPU_LITTLE_ENDIAN is not set

  • arch/mips/defconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/defconfig linux-2.6.17.4-mips/arch/mips/defconfig
    old new  
    6767CONFIG_GENERIC_FIND_NEXT_BIT=y
    6868CONFIG_GENERIC_HWEIGHT=y
    6969CONFIG_GENERIC_CALIBRATE_DELAY=y
     70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
    7071CONFIG_ARC=y
    7172CONFIG_DMA_NONCOHERENT=y
    7273CONFIG_DMA_NEED_PCI_MAP_STATE=y

  • arch/mips/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/Kconfig linux-2.6.17.4-mips/arch/mips/Kconfig
    old new  
    278278        select SYS_SUPPORTS_64BIT_KERNEL
    279279        select SYS_SUPPORTS_BIG_ENDIAN
    280280        select SYS_SUPPORTS_LITTLE_ENDIAN
     281        select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
    281282        help
    282283          This enables support for the MIPS Technologies Atlas evaluation
    283284          board.
    … …  
    294295        select I8259
    295296        select MIPS_BOARDS_GEN
    296297        select MIPS_BONITO64
     298        select MIPS_CPU_SCACHE
    297299        select MIPS_GT64120
    298300        select MIPS_MSC
    299301        select SWAP_IO_SPACE
    … …  
    306308        select SYS_SUPPORTS_64BIT_KERNEL
    307309        select SYS_SUPPORTS_BIG_ENDIAN
    308310        select SYS_SUPPORTS_LITTLE_ENDIAN
     311        select SYS_SUPPORTS_MULTITHREADING
    309312        help
    310313          This enables support for the MIPS Technologies Malta evaluation
    311314          board.
    … …  
    438441
    439442config PNX8550_V2PCI
    440443        bool "Philips PNX8550 based Viper2-PCI board"
     444        depends on BROKEN
    441445        select PNX8550
    442446        select SYS_SUPPORTS_LITTLE_ENDIAN
    443447
    444448config PNX8550_JBS
    445449        bool "Philips PNX8550 based JBS board"
     450        depends on BROKEN
    446451        select PNX8550
    447452        select SYS_SUPPORTS_LITTLE_ENDIAN
    448453
    … …  
    506511config MACH_VR41XX
    507512        bool "NEC VR41XX-based machines"
    508513        select SYS_HAS_CPU_VR41XX
    509         select SYS_SUPPORTS_32BIT_KERNEL
    510         select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
    511514
    512515config PMC_YOSEMITE
    513516        bool "PMC-Sierra Yosemite eval board"
    … …  
    522525        select SYS_SUPPORTS_64BIT_KERNEL
    523526        select SYS_SUPPORTS_BIG_ENDIAN
    524527        select SYS_SUPPORTS_HIGHMEM
     528        select SYS_SUPPORTS_SMP
    525529        help
    526530          Yosemite is an evaluation board for the RM9000x2 processor
    527531          manufactured by PMC-Sierra.
    … …  
    555559        select HW_HAS_EISA
    556560        select IP22_CPU_SCACHE
    557561        select IRQ_CPU
     562        select NO_ISA if ISA
    558563        select SWAP_IO_SPACE
    559564        select SYS_HAS_CPU_R4X00
    560565        select SYS_HAS_CPU_R5000
    … …  
    577582        select SYS_HAS_CPU_R10000
    578583        select SYS_SUPPORTS_64BIT_KERNEL
    579584        select SYS_SUPPORTS_BIG_ENDIAN
     585        select SYS_SUPPORTS_SMP
    580586        help
    581587          This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
    582588          workstations.  To compile a Linux kernel that runs on these, say Y
    … …  
    10351041config HAVE_STD_PC_SERIAL_PORT
    10361042        bool
    10371043
     1044config VR4181
     1045        bool
     1046
    10381047config ARC_CONSOLE
    10391048        bool "ARC console support"
    10401049        depends on SGI_IP22 || SNI_RM200_PCI
    … …  
    11551164        select CPU_SUPPORTS_32BIT_KERNEL
    11561165        select CPU_SUPPORTS_64BIT_KERNEL
    11571166        help
    1158           The options selects support for the NEC VR4100 series of processors.
     1167          The options selects support for the NEC VR41xx series of processors.
    11591168          Only choose this option if you have one of these processors as a
    11601169          kernel built with this option will not run on any other type of
    11611170          processor or vice versa.
    … …  
    12111220        select CPU_SUPPORTS_32BIT_KERNEL
    12121221        help
    12131222          MIPS Technologies R6000 and R6000A series processors.  Note these
    1214           processors are extremly rare and the support for them is incomplete.
     1223          processors are extremely rare and the support for them is incomplete.
    12151224
    12161225config CPU_NEVADA
    12171226        bool "RM52xx"
    … …  
    13321341endmenu
    13331342
    13341343#
    1335 # These two indicate any levelof the MIPS32 and MIPS64 architecture
     1344# These two indicate any level of the MIPS32 and MIPS64 architecture
    13361345#
    13371346config CPU_MIPS32
    13381347        bool
    … …  
    13431352        default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
    13441353
    13451354#
    1346 # These two indicate the revision of the architecture, either 32 bot 64 bit.
     1355# These two indicate the revision of the architecture, either Release 1 or Release 2
    13471356#
    13481357config CPU_MIPSR1
    13491358        bool
    … …  
    14361445        bool
    14371446        select BOARD_SCACHE
    14381447
     1448#
     1449# Support for a MIPS32 / MIPS64 style S-caches
     1450#
     1451config MIPS_CPU_SCACHE
     1452        bool
     1453        select BOARD_SCACHE
     1454
    14391455config R5000_CPU_SCACHE
    14401456        bool
    14411457        select BOARD_SCACHE
    … …  
    14551471config CPU_HAS_PREFETCH
    14561472        bool
    14571473
    1458 config MIPS_MT
    1459         bool "Enable MIPS MT"
    1460 
    14611474choice
    14621475        prompt "MIPS MT options"
    1463         depends on MIPS_MT
     1476
     1477config MIPS_MT_DISABLED
     1478        bool "Disable multithreading support."
     1479        help
     1480          Use this option if your workload can't take advantage of
     1481          MIPS hardware multithreading support.  On systems that don't have
     1482          the option of an MT-enabled processor this option will be the only
     1483          option in this menu.
    14641484
    14651485config MIPS_MT_SMTC
    14661486        bool "SMTC: Use all TCs on all VPEs for SMP"
     1487        depends on CPU_MIPS32_R2
     1488        #depends on CPU_MIPS64_R2               # once there is hardware ...
     1489        depends on SYS_SUPPORTS_MULTITHREADING
    14671490        select CPU_MIPSR2_IRQ_VI
    14681491        select CPU_MIPSR2_SRS
     1492        select MIPS_MT
    14691493        select SMP
     1494        help
     1495          This is a kernel model which is known a SMTC or lately has been
     1496          marketesed into SMVP.
    14701497
    14711498config MIPS_MT_SMP
    14721499        bool "Use 1 TC on each available VPE for SMP"
     1500        depends on SYS_SUPPORTS_MULTITHREADING
     1501        select CPU_MIPSR2_IRQ_VI
     1502        select CPU_MIPSR2_SRS
     1503        select MIPS_MT
    14731504        select SMP
     1505        help
     1506          This is a kernel model which is also known a VSMP or lately
     1507          has been marketesed into SMVP.
    14741508
    14751509config MIPS_VPE_LOADER
    14761510        bool "VPE loader support."
    1477         depends on MIPS_MT
     1511        depends on SYS_SUPPORTS_MULTITHREADING
     1512        select MIPS_MT
    14781513        help
    14791514          Includes a loader for loading an elf relocatable object
    14801515          onto another VPE and running it.
    14811516
    14821517endchoice
    14831518
     1519config MIPS_MT
     1520        bool
     1521
     1522config SYS_SUPPORTS_MULTITHREADING
     1523        bool
     1524
    14841525config MIPS_MT_FPAFF
    14851526        bool "Dynamic FPU affinity for FP-intensive threads"
    14861527        depends on MIPS_MT
    … …  
    15371578config CPU_HAS_WB
    15381579        bool
    15391580
     1581#
     1582# Vectored interrupt mode is an R2 feature
     1583#
    15401584config CPU_MIPSR2_IRQ_VI
    1541         bool "Vectored interrupt mode"
    1542         depends on CPU_MIPSR2
    1543         help
    1544            Vectored interrupt mode allowing faster dispatching of interrupts.
    1545            The board support code needs to be written to take advantage of this
    1546            mode.  Compatibility code is included to allow the kernel to run on
    1547            a CPU that does not support vectored interrupts.  It's safe to
    1548            say Y here.
     1585        bool
    15491586
     1587#
     1588# Extended interrupt mode is an R2 feature
     1589#
    15501590config CPU_MIPSR2_IRQ_EI
    1551         bool "External interrupt controller mode"
    1552         depends on CPU_MIPSR2
    1553         help
    1554            Extended interrupt mode takes advantage of an external interrupt
    1555            controller to allow fast dispatching from many possible interrupt
    1556            sources. Say N unless you know that external interrupt support is
    1557            required.
     1591        bool
    15581592
     1593#
     1594# Shadow registers are an R2 feature
     1595#
    15591596config CPU_MIPSR2_SRS
    1560         bool "Make shadow set registers available for interrupt handlers"
    1561         depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
    1562         help
    1563            Allow the kernel to use shadow register sets for fast interrupts.
    1564            Interrupt handlers must be specially written to use shadow sets.
    1565            Say N unless you know that shadow register set upport is needed.
     1597        bool
    15661598
    15671599config CPU_HAS_SYNC
    15681600        bool
    … …  
    16161648
    16171649config SMP
    16181650        bool "Multi-Processing support"
    1619         depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC
    1620         ---help---
     1651        depends on SYS_SUPPORTS_SMP
     1652        help
    16211653          This enables support for systems with more than one CPU. If you have
    16221654          a system with only one CPU, like most personal computers, say N. If
    16231655          you have a system with more than one CPU, say Y.
    … …  
    16361668
    16371669          If you don't know what to do here, say N.
    16381670
     1671config SYS_SUPPORTS_SMP
     1672        bool
     1673
    16391674config NR_CPUS
    16401675        int "Maximum number of CPUs (2-64)"
    16411676        range 2 64
    … …  
    17101745config ISA
    17111746        bool
    17121747
     1748config NO_ISA
     1749        bool
     1750
    17131751config EISA
    17141752        bool "EISA support"
    17151753        depends on HW_HAS_EISA

  • arch/mips/kernel/cpu-probe.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/cpu-probe.c linux-2.6.17.4-mips/arch/mips/kernel/cpu-probe.c
    old new  
    111111        case CPU_R5000:
    112112        case CPU_NEVADA:
    113113        case CPU_RM7000:
    114         case CPU_RM9000:
    115114        case CPU_TX49XX:
    116115        case CPU_4KC:
    117116        case CPU_4KEC:
    … …  
    137136                } else
    138137                        printk(" unavailable.\n");
    139138                break;
     139        case CPU_RM9000:
     140                if ((c->processor_id & 0x00ff) >= 0x40) {
     141                        cpu_wait = r4k_wait;
     142                        printk(" available.\n");
     143                } else {
     144                        printk(" unavailable.\n");
     145                }
     146                break;
    140147        default:
    141148                printk(" unavailable.\n");
    142149                break;
    … …  
    243250                break;
    244251        case PRID_IMP_VR41XX:
    245252                switch (c->processor_id & 0xf0) {
     253#ifndef CONFIG_VR4181
    246254                case PRID_REV_VR4111:
    247255                        c->cputype = CPU_VR4111;
    248256                        break;
     257#else
     258                case PRID_REV_VR4181:
     259                        c->cputype = CPU_VR4181;
     260                        break;
     261#endif
    249262                case PRID_REV_VR4121:
    250263                        c->cputype = CPU_VR4121;
    251264                        break;
    … …  
    597610                break;
    598611        case PRID_IMP_25KF:
    599612                c->cputype = CPU_25KF;
    600                 /* Probe for L2 cache */
    601                 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
    602613                break;
    603614        case PRID_IMP_34K:
    604615                c->cputype = CPU_34K;

  • arch/mips/kernel/entry.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/entry.S linux-2.6.17.4-mips/arch/mips/kernel/entry.S
    old new  
    8787        ori     v1, v0, TCSTATUS_IXMT
    8888        mtc0    v1, CP0_TCSTATUS
    8989        andi    v0, TCSTATUS_IXMT
    90         ehb
     90        _ehb
    9191        mfc0    t0, CP0_TCCONTEXT
    9292        DMT     9                               # dmt t1
    9393        jal     mips_ihb
    … …  
    9595        andi    t3, t0, 0xff00
    9696        or      t2, t2, t3
    9797        mtc0    t2, CP0_STATUS
    98         ehb
     98        _ehb
    9999        andi    t1, t1, VPECONTROL_TE
    100100        beqz    t1, 1f
    101101        EMT
    … …  
    105105        xori    v1, v1, TCSTATUS_IXMT
    106106        or      v1, v0, v1
    107107        mtc0    v1, CP0_TCSTATUS
    108         ehb
     108        _ehb
    109109        xor     t0, t0, t3
    110110        mtc0    t0, CP0_TCCONTEXT
    111111#endif /* CONFIG_MIPS_MT_SMTC */

  • arch/mips/kernel/gdb-low.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/gdb-low.S linux-2.6.17.4-mips/arch/mips/kernel/gdb-low.S
    old new  
    291291                ori     t1, t2, TCSTATUS_IXMT
    292292                mtc0    t1, CP0_TCSTATUS
    293293                andi    t2, t2, TCSTATUS_IXMT
    294                 ehb
     294                _ehb
    295295                DMT     9                               # dmt   t1
    296296                jal     mips_ihb
    297297                nop
    … …  
    310310                xori    t1, t1, TCSTATUS_IXMT
    311311                or      t1, t1, t2
    312312                mtc0    t1, CP0_TCSTATUS
    313                 ehb
     313                _ehb
    314314#endif /* CONFIG_MIPS_MT_SMTC */
    315315                LONG_L  v0, GDB_FR_STATUS(sp)
    316316                LONG_L  v1, GDB_FR_EPC(sp)

  • arch/mips/kernel/genex.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/genex.S linux-2.6.17.4-mips/arch/mips/kernel/genex.S
    old new  
    214214        mtc0    t0, CP0_TCCONTEXT
    215215        xor     t1, t1, t0
    216216        mtc0    t1, CP0_STATUS
    217         ehb
     217        _ehb
    218218#endif /* CONFIG_MIPS_MT_SMTC */
    219219        CLI
    220220        move    a0, sp

  • arch/mips/kernel/head.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/head.S linux-2.6.17.4-mips/arch/mips/kernel/head.S
    old new  
    9696        /* Clear TKSU, leave IXMT */
    9797        xori    t0, 0x00001800
    9898        mtc0    t0, CP0_TCSTATUS
    99         ehb
     99        _ehb
    100100        /* We need to leave the global IE bit set, but clear EXL...*/
    101101        mfc0    t0, CP0_STATUS
    102102        or      t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr

  • arch/mips/kernel/ptrace.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/ptrace.c linux-2.6.17.4-mips/arch/mips/kernel/ptrace.c
    old new  
    2121#include <linux/mm.h>
    2222#include <linux/errno.h>
    2323#include <linux/ptrace.h>
    24 #include <linux/audit.h>
    2524#include <linux/smp.h>
    2625#include <linux/smp_lock.h>
    2726#include <linux/user.h>
    2827#include <linux/security.h>
    29 #include <linux/signal.h>
     28#include <linux/audit.h>
     29#include <linux/seccomp.h>
    3030
    3131#include <asm/byteorder.h>
    3232#include <asm/cpu.h>
    … …  
    482482 */
    483483asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
    484484{
     485        /* do the secure computing check first */
     486        secure_computing(regs->orig_eax);
     487
    485488        if (unlikely(current->audit_context) && entryexit)
    486489                audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
    487490                                   regs->regs[2]);
    488491
    489492        if (!(current->ptrace & PT_PTRACED))
    490493                goto out;
     494
    491495        if (!test_thread_flag(TIF_SYSCALL_TRACE))
    492496                goto out;
    493497
    … …  
    505509                send_sig(current->exit_code, current, 1);
    506510                current->exit_code = 0;
    507511        }
    508  out:
     512
     513out:
     514        /* There is no ->orig_eax and that's quite intensional for now making
     515           this work will require some work in various other place before it's
     516           more than a placebo.  */
     517
    509518        if (unlikely(current->audit_context) && !entryexit)
    510                 audit_syscall_entry(audit_arch(), regs->regs[2],
    511                                     regs->regs[4], regs->regs[5],
    512                                     regs->regs[6], regs->regs[7]);
     519                audit_syscall_entry(audit_arch(), regs->orig_eax,
     520                                    regs->regs[4], regs->regs[5],
     521                                    regs->regs[6], regs->regs[7]);
    513522}

  • arch/mips/kernel/r4k_switch.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/r4k_switch.S linux-2.6.17.4-mips/arch/mips/kernel/r4k_switch.S
    old new  
    7575        and     t0, t0, t1
    7676        LONG_S  t0, ST_OFF(t3)
    7777
    78         fpu_save_double a0 t1 t0 t2             # c0_status passed in t1
    79                                                 # clobbers t0 and t2
     78        fpu_save_double a0 t0 t1                # c0_status passed in t0
     79                                                # clobbers t1
    80801:
    8181
    8282        /*
    … …  
    9494        ori     t1, t2, TCSTATUS_IXMT
    9595        mtc0    t1, CP0_TCSTATUS
    9696        andi    t2, t2, TCSTATUS_IXMT
    97         ehb
     97        _ehb
    9898        DMT     8                               # dmt   t0
    9999        move    t1,ra
    100100        jal     mips_ihb
    … …  
    109109        or      a2, t1
    110110        mtc0    a2, CP0_STATUS
    111111#ifdef CONFIG_MIPS_MT_SMTC
    112         ehb
     112        _ehb
    113113        andi    t0, t0, VPECONTROL_TE
    114114        beqz    t0, 1f
    115115        emt
    … …  
    118118        xori    t1, t1, TCSTATUS_IXMT
    119119        or      t1, t1, t2
    120120        mtc0    t1, CP0_TCSTATUS
    121         ehb
     121        _ehb
    122122#endif /* CONFIG_MIPS_MT_SMTC */
    123123        move    v0, a0
    124124        jr      ra
    … …  
    129129 */
    130130LEAF(_save_fp)
    131131#ifdef CONFIG_64BIT
    132         mfc0    t1, CP0_STATUS
     132        mfc0    t0, CP0_STATUS
    133133#endif
    134         fpu_save_double a0 t1 t0 t2             # clobbers t1
     134        fpu_save_double a0 t0 t1                # clobbers t1
    135135        jr      ra
    136136        END(_save_fp)
    137137
    … …  
    139139 * Restore a thread's fp context.
    140140 */
    141141LEAF(_restore_fp)
    142         fpu_restore_double a0, t1               # clobbers t1
     142#ifdef CONFIG_64BIT
     143        mfc0    t0, CP0_STATUS
     144#endif
     145        fpu_restore_double a0 t0 t1             # clobbers t1
    143146        jr      ra
    144147        END(_restore_fp)
    145148

  • arch/mips/kernel/scall32-o32.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/scall32-o32.S linux-2.6.17.4-mips/arch/mips/kernel/scall32-o32.S
    old new  
    497497        sys     sys_sched_get_priority_min 1
    498498        sys     sys_sched_rr_get_interval 2     /* 4165 */
    499499        sys     sys_nanosleep,          2
    500         sys     sys_mremap,             4
     500        sys     sys_mremap,             5
    501501        sys     sys_accept              3
    502502        sys     sys_bind                3
    503503        sys     sys_connect             3       /* 4170 */
    … …  
    647647        sys     sys_unshare             1
    648648        sys     sys_splice              4
    649649        sys     sys_sync_file_range     7       /* 4305 */
     650        sys     sys_tee                 4
    650651        .endm
    651652
    652653        /* We pre-compute the number of _instruction_ bytes needed to

  • arch/mips/kernel/scall64-64.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/scall64-64.S linux-2.6.17.4-mips/arch/mips/kernel/scall64-64.S
    old new  
    462462        PTR     sys_unshare
    463463        PTR     sys_splice
    464464        PTR     sys_sync_file_range
     465        PTR     sys_tee                         /* 5265 */

  • arch/mips/kernel/scall64-n32.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/scall64-n32.S linux-2.6.17.4-mips/arch/mips/kernel/scall64-n32.S
    old new  
    388388        PTR     sys_unshare
    389389        PTR     sys_splice
    390390        PTR     sys_sync_file_range
     391        PTR     sys_tee

  • arch/mips/kernel/scall64-o32.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/scall64-o32.S linux-2.6.17.4-mips/arch/mips/kernel/scall64-o32.S
    old new  
    510510        PTR     sys_unshare
    511511        PTR     sys_splice
    512512        PTR     sys32_sync_file_range           /* 4305 */
     513        PTR     sys_tee
    513514        .size   sys_call_table,.-sys_call_table

  • arch/mips/kernel/smp.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/smp.c linux-2.6.17.4-mips/arch/mips/kernel/smp.c
    old new  
    336336        preempt_disable();
    337337
    338338        if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
    339                 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
     339                __on_other_cores(flush_tlb_mm_ipi, (void *)mm);
    340340        } else {
    341341                int i;
    342342                for (i = 0; i < num_online_cpus(); i++)
    … …  
    372372                fd.vma = vma;
    373373                fd.addr1 = start;
    374374                fd.addr2 = end;
    375                 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
     375                __on_other_cores(flush_tlb_range_ipi, (void *)&fd);
    376376        } else {
    377377                int i;
    378378                for (i = 0; i < num_online_cpus(); i++)
    … …  
    414414
    415415                fd.vma = vma;
    416416                fd.addr1 = page;
    417                 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
     417                __on_other_cores(flush_tlb_page_ipi, (void *)&fd);
    418418        } else {
    419419                int i;
    420420                for (i = 0; i < num_online_cpus(); i++)
    … …  
    434434
    435435void flush_tlb_one(unsigned long vaddr)
    436436{
    437         smp_call_function(flush_tlb_one_ipi, (void *) vaddr, 1, 1);
    438         local_flush_tlb_one(vaddr);
     437        __on_each_core(flush_tlb_one_ipi, (void *) vaddr);
    439438}
    440439
    441440static DEFINE_PER_CPU(struct cpu, cpu_devices);

  • arch/mips/kernel/smtc-asm.S 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/smtc-asm.S linux-2.6.17.4-mips/arch/mips/kernel/smtc-asm.S
    old new  
    5252        .set    noat
    5353        /* Disable thread scheduling to make Status update atomic */
    5454        DMT     27                                      # dmt   k1
    55         ehb
     55        _ehb
    5656        /* Set EXL */
    5757        mfc0    k0,CP0_STATUS
    5858        ori     k0,k0,ST0_EXL
    5959        mtc0    k0,CP0_STATUS
    60         ehb
     60        _ehb
    6161        /* Thread scheduling now inhibited by EXL. Restore TE state. */
    6262        andi    k1,k1,VPECONTROL_TE
    6363        beqz    k1,1f
    … …  
    8282        li      k1,ST0_CU0
    8383        or      k1,k1,k0
    8484        mtc0    k1,CP0_STATUS
    85         ehb
     85        _ehb
    8686        get_saved_sp
    8787        /* Interrupting TC will have pre-set values in slots in the new frame */
    88882:      subu    k1,k1,PT_SIZE
    … …  
    9090        lw      k0,PT_TCSTATUS(k1)
    9191        /* Write it to TCStatus to restore CU/KSU/IXMT state */
    9292        mtc0    k0,$2,1
    93         ehb
     93        _ehb
    9494        lw      k0,PT_EPC(k1)
    9595        mtc0    k0,CP0_EPC
    9696        /* Save all will redundantly recompute the SP, but use it for now */
    … …  
    116116        mfc0    t0,CP0_TCSTATUS
    117117        ori     t1,t0,TCSTATUS_IXMT
    118118        mtc0    t1,CP0_TCSTATUS
    119         ehb
     119        _ehb
    120120        /* We know we're in kernel mode, so prepare stack frame */
    121121        subu    t1,sp,PT_SIZE
    122122        sw      ra,PT_EPC(t1)

  • arch/mips/kernel/traps.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/kernel/traps.c linux-2.6.17.4-mips/arch/mips/kernel/traps.c
    old new  
    10511051        return (void *)old_handler;
    10521052}
    10531053
    1054 #ifdef CONFIG_CPU_MIPSR2
     1054#ifdef CONFIG_CPU_MIPSR2_SRS
    10551055/*
    10561056 * MIPSR2 shadow register set allocation
    10571057 * FIXME: SMP...
    … …  
    10701070
    10711071static void mips_srs_init(void)
    10721072{
    1073 #ifdef CONFIG_CPU_MIPSR2_SRS
    10741073        shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
    10751074        printk(KERN_INFO "%d MIPSR2 register sets available\n",
    10761075               shadow_registers.sr_supported);
    1077 #endif
    10781076        shadow_registers.sr_allocated = 1;      /* Set 0 used by kernel */
    10791077}
    10801078
    … …  
    11991197{
    12001198        return set_vi_srs_handler(n, addr, 0);
    12011199}
    1202 #endif
     1200
     1201#else
     1202
     1203static inline void mips_srs_init(void)
     1204{
     1205}
     1206
     1207#endif /* CONFIG_CPU_MIPSR2_SRS */
    12031208
    12041209/*
    12051210 * This is used by native signal handling
    … …  
    13891394        else
    13901395                ebase = CAC_BASE;
    13911396
    1392 #ifdef CONFIG_CPU_MIPSR2
    13931397        mips_srs_init();
    1394 #endif
    13951398
    13961399        per_cpu_trap_init();
    13971400

  • arch/mips/lib/iomap.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/lib/iomap.c linux-2.6.17.4-mips/arch/mips/lib/iomap.c
    old new  
    1 /*
    2  *  iomap.c, Memory Mapped I/O routines for MIPS architecture.
    3  *
    4  *  This code is based on lib/iomap.c, by Linus Torvalds.
    5  *
    6  *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
    7  *
    8  *  This program is free software; you can redistribute it and/or modify
    9  *  it under the terms of the GNU General Public License as published by
    10  *  the Free Software Foundation; either version 2 of the License, or
    11  *  (at your option) any later version.
    12  *
    13  *  This program is distributed in the hope that it will be useful,
    14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  *  GNU General Public License for more details.
    17  *
    18  *  You should have received a copy of the GNU General Public License
    19  *  along with this program; if not, write to the Free Software
    20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    21  */
    22 #include <linux/ioport.h>
    23 #include <linux/module.h>
    24 #include <linux/pci.h>
    25 
    26 #include <asm/io.h>
    27 
    28 void __iomem *ioport_map(unsigned long port, unsigned int nr)
    29 {
    30         unsigned long end;
    31 
    32         end = port + nr - 1UL;
    33         if (ioport_resource.start > port ||
    34             ioport_resource.end < end || port > end)
    35                 return NULL;
    36 
    37         return (void __iomem *)(mips_io_port_base + port);
    38 }
    39 
    40 void ioport_unmap(void __iomem *addr)
    41 {
    42 }
    43 EXPORT_SYMBOL(ioport_map);
    44 EXPORT_SYMBOL(ioport_unmap);
    45 
    46 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
    47 {
    48         unsigned long start, len, flags;
    49 
    50         if (dev == NULL)
    51                 return NULL;
    52 
    53         start = pci_resource_start(dev, bar);
    54         len = pci_resource_len(dev, bar);
    55         if (!start || !len)
    56                 return NULL;
    57 
    58         if (maxlen != 0 && len > maxlen)
    59                 len = maxlen;
    60 
    61         flags = pci_resource_flags(dev, bar);
    62         if (flags & IORESOURCE_IO)
    63                 return ioport_map(start, len);
    64         if (flags & IORESOURCE_MEM) {
    65                 if (flags & IORESOURCE_CACHEABLE)
    66                         return ioremap_cachable(start, len);
    67                 return ioremap_nocache(start, len);
    68         }
    69 
    70         return NULL;
    71 }
    72 
    73 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
    74 {
    75         iounmap(addr);
    76 }
    77 EXPORT_SYMBOL(pci_iomap);
    78 EXPORT_SYMBOL(pci_iounmap);

  • arch/mips/lib/Makefile 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/lib/Makefile linux-2.6.17.4-mips/arch/mips/lib/Makefile
    old new  
    55lib-y   += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
    66           strnlen_user.o uncached.o
    77
    8 obj-y   += iomap.o
     8# libgcc-style stuff needed in the kernel
     9lib-y += ashldi3.o ashrdi3.o lshrdi3.o
    910
    1011EXTRA_AFLAGS := $(CFLAGS)

  • arch/mips/lib-32/dump_tlb.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/lib-32/dump_tlb.c linux-2.6.17.4-mips/arch/mips/lib-32/dump_tlb.c
    old new  
    4141                return "256Mb";
    4242#endif
    4343        }
    44 
    45         return "unknown";
    4644}
    4745
    4846#define BARRIER()                                       \

  • arch/mips/lib-64/dump_tlb.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/lib-64/dump_tlb.c linux-2.6.17.4-mips/arch/mips/lib-64/dump_tlb.c
    old new  
    3232        case PM_256M:   return "256Mb";
    3333#endif
    3434        }
    35 
    36         return "unknown";
    3735}
    3836
    3937#define BARRIER()                                       \

  • arch/mips/Makefile 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/Makefile linux-2.6.17.4-mips/arch/mips/Makefile
    old new  
    8383LDFLAGS_vmlinux                 += -G 0 -static -n -nostdlib
    8484MODFLAGS                        += -mlong-calls
    8585
     86cflags-y += -ffreestanding
     87
    8688#
    8789# We explicitly add the endianness specifier if needed, this allows
    8890# to compile kernels with a toolchain for the other endianness. We
    … …  
    365367cflags-$(CONFIG_PMC_YOSEMITE)   += -Iinclude/asm-mips/mach-yosemite
    366368load-$(CONFIG_PMC_YOSEMITE)     += 0xffffffff80100000
    367369
     370#
    368371# Qemu simulating MIPS32 4Kc
    369372#
    370373core-$(CONFIG_QEMU)             += arch/mips/qemu/

  • arch/mips/mips-boards/generic/memory.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/mips-boards/generic/memory.c linux-2.6.17.4-mips/arch/mips/mips-boards/generic/memory.c
    old new  
    4848};
    4949#endif
    5050
     51/* determined physical memory size, not overridden by command line args  */
     52unsigned long physical_memsize = 0L;
     53
    5154struct prom_pmemblock * __init prom_getmdesc(void)
    5255{
    5356        char *memsize_str;
    5457        unsigned int memsize;
    5558        char cmdline[CL_SIZE], *ptr;
    5659
    57         /* Check the command line first for a memsize directive */
     60        /* otherwise look in the environment */
     61        memsize_str = prom_getenv("memsize");
     62        if (!memsize_str) {
     63                prom_printf("memsize not set in boot prom, set to default (32Mb)\n");
     64                physical_memsize = 0x02000000;
     65        } else {
     66#ifdef DEBUG
     67                prom_printf("prom_memsize = %s\n", memsize_str);
     68#endif
     69                physical_memsize = simple_strtol(memsize_str, NULL, 0);
     70        }
     71
     72#ifdef CONFIG_CPU_BIG_ENDIAN
     73        /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
     74           word of physical memory */
     75        physical_memsize -= PAGE_SIZE;
     76#endif
     77
     78        /* Check the command line for a memsize directive that overrides
     79           the physical/default amount */
    5880        strcpy(cmdline, arcs_cmdline);
    5981        ptr = strstr(cmdline, "memsize=");
    6082        if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
    6183                ptr = strstr(ptr, " memsize=");
    6284
    63         if (ptr) {
     85        if (ptr)
    6486                memsize = memparse(ptr + 8, &ptr);
    65         }
    66         else {
    67                 /* otherwise look in the environment */
    68                 memsize_str = prom_getenv("memsize");
    69                 if (!memsize_str) {
    70                         prom_printf("memsize not set in boot prom, set to default (32Mb)\n");
    71                         memsize = 0x02000000;
    72                 } else {
    73 #ifdef DEBUG
    74                         prom_printf("prom_memsize = %s\n", memsize_str);
    75 #endif
    76                         memsize = simple_strtol(memsize_str, NULL, 0);
    77                 }
    78         }
     87        else
     88                memsize = physical_memsize;
     89
    7990        memset(mdesc, 0, sizeof(mdesc));
    8091
    8192        mdesc[0].type = yamon_dontuse;

  • arch/mips/mips-boards/malta/malta_int.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/mips-boards/malta/malta_int.c linux-2.6.17.4-mips/arch/mips/mips-boards/malta/malta_int.c
    old new  
    208208        unsigned int a0 = 7;
    209209        unsigned int t0;
    210210
    211         t0 = s0 & 0xf000;
     211        t0 = pending & 0xf000;
    212212        t0 = t0 < 1;
    213213        t0 = t0 << 2;
    214214        a0 = a0 - t0;
    215         s0 = s0 << t0;
     215        pending = pending << t0;
    216216
    217         t0 = s0 & 0xc000;
     217        t0 = pending & 0xc000;
    218218        t0 = t0 < 1;
    219219        t0 = t0 << 1;
    220220        a0 = a0 - t0;
    221         s0 = s0 << t0;
     221        pending = pending << t0;
    222222
    223         t0 = s0 & 0x8000;
     223        t0 = pending & 0x8000;
    224224        t0 = t0 < 1;
    225225        //t0 = t0 << 2;
    226226        a0 = a0 - t0;
    227         //s0 = s0 << t0;
     227        //pending = pending << t0;
    228228
    229229        return a0;
    230230#endif

  • arch/mips/mm/c-r4k.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/mm/c-r4k.c linux-2.6.17.4-mips/arch/mips/mm/c-r4k.c
    old new  
    2424#include <asm/page.h>
    2525#include <asm/pgtable.h>
    2626#include <asm/r4kcache.h>
     27#include <asm/smp.h>
    2728#include <asm/system.h>
    2829#include <asm/mmu_context.h>
    2930#include <asm/war.h>
    3031#include <asm/cacheflush.h> /* for run_uncached() */
    3132
    32 
    33 /*
    34  * Special Variant of smp_call_function for use by cache functions:
    35  *
    36  *  o No return value
    37  *  o collapses to normal function call on UP kernels
    38  *  o collapses to normal function call on systems with a single shared
    39  *    primary cache.
    40  */
    41 static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
    42                                    int retry, int wait)
    43 {
    44         preempt_disable();
    45 
    46 #if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
    47         smp_call_function(func, info, retry, wait);
    48 #endif
    49         func(info);
    50         preempt_enable();
    51 }
    52 
    5333/*
    5434 * Must die.
    5535 */
    … …  
    6040/*
    6141 * Dummy cache handling routines for machines without boardcaches
    6242 */
    63 static void no_sc_noop(void) {}
     43static void cache_noop(void) {}
    6444
    6545static struct bcache_ops no_sc_ops = {
    66         .bc_enable = (void *)no_sc_noop,
    67         .bc_disable = (void *)no_sc_noop,
    68         .bc_wback_inv = (void *)no_sc_noop,
    69         .bc_inv = (void *)no_sc_noop
     46        .bc_enable = (void *)cache_noop,
     47        .bc_disable = (void *)cache_noop,
     48        .bc_wback_inv = (void *)cache_noop,
     49        .bc_inv = (void *)cache_noop
    7050};
    7151
    7252struct bcache_ops *bcops = &no_sc_ops;
    … …  
    9474{
    9575        unsigned long  dc_lsize = cpu_dcache_line_size();
    9676
    97         if (dc_lsize == 16)
     77        if (dc_lsize == 0)
     78                r4k_blast_dcache_page = (void *)cache_noop;
     79        else if (dc_lsize == 16)
    9880                r4k_blast_dcache_page = blast_dcache16_page;
    9981        else if (dc_lsize == 32)
    10082                r4k_blast_dcache_page = r4k_blast_dcache_page_dc32;
    … …  
    10688{
    10789        unsigned long dc_lsize = cpu_dcache_line_size();
    10890
    109         if (dc_lsize == 16)
     91        if (dc_lsize == 0)
     92                r4k_blast_dcache_page_indexed = (void *)cache_noop;
     93        else if (dc_lsize == 16)
    11094                r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed;
    11195        else if (dc_lsize == 32)
    11296                r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed;
    … …  
    118102{
    119103        unsigned long dc_lsize = cpu_dcache_line_size();
    120104
    121         if (dc_lsize == 16)
     105        if (dc_lsize == 0)
     106                r4k_blast_dcache = (void *)cache_noop;
     107        else if (dc_lsize == 16)
    122108                r4k_blast_dcache = blast_dcache16;
    123109        else if (dc_lsize == 32)
    124110                r4k_blast_dcache = blast_dcache32;
    … …  
    201187{
    202188        unsigned long ic_lsize = cpu_icache_line_size();
    203189
    204         if (ic_lsize == 16)
     190        if (ic_lsize == 0)
     191                r4k_blast_icache_page = (void *)cache_noop;
     192        else if (ic_lsize == 16)
    205193                r4k_blast_icache_page = blast_icache16_page;
    206194        else if (ic_lsize == 32)
    207195                r4k_blast_icache_page = blast_icache32_page;
    … …  
    216204{
    217205        unsigned long ic_lsize = cpu_icache_line_size();
    218206
    219         if (ic_lsize == 16)
     207        if (ic_lsize == 0)
     208                r4k_blast_icache_page_indexed = (void *)cache_noop;
     209        else if (ic_lsize == 16)
    220210                r4k_blast_icache_page_indexed = blast_icache16_page_indexed;
    221211        else if (ic_lsize == 32) {
    222212                if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
    … …  
    238228{
    239229        unsigned long ic_lsize = cpu_icache_line_size();
    240230
    241         if (ic_lsize == 16)
     231        if (ic_lsize == 0)
     232                r4k_blast_icache = (void *)cache_noop;
     233        else if (ic_lsize == 16)
    242234                r4k_blast_icache = blast_icache16;
    243235        else if (ic_lsize == 32) {
    244236                if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
    … …  
    258250        unsigned long sc_lsize = cpu_scache_line_size();
    259251
    260252        if (scache_size == 0)
    261                 r4k_blast_scache_page = (void *)no_sc_noop;
     253                r4k_blast_scache_page = (void *)cache_noop;
    262254        else if (sc_lsize == 16)
    263255                r4k_blast_scache_page = blast_scache16_page;
    264256        else if (sc_lsize == 32)
    … …  
    276268        unsigned long sc_lsize = cpu_scache_line_size();
    277269
    278270        if (scache_size == 0)
    279                 r4k_blast_scache_page_indexed = (void *)no_sc_noop;
     271                r4k_blast_scache_page_indexed = (void *)cache_noop;
    280272        else if (sc_lsize == 16)
    281273                r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
    282274        else if (sc_lsize == 32)
    … …  
    294286        unsigned long sc_lsize = cpu_scache_line_size();
    295287
    296288        if (scache_size == 0)
    297                 r4k_blast_scache = (void *)no_sc_noop;
     289                r4k_blast_scache = (void *)cache_noop;
    298290        else if (sc_lsize == 16)
    299291                r4k_blast_scache = blast_scache16;
    300292        else if (sc_lsize == 32)
    … …  
    320312        if (!cpu_has_dc_aliases)
    321313                return;
    322314
    323         r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
     315        __on_each_core(local_r4k_flush_cache_all, NULL);
    324316}
    325317
    326318static inline void local_r4k___flush_cache_all(void * args)
    … …  
    342334
    343335static void r4k___flush_cache_all(void)
    344336{
    345         r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
     337        __on_each_core(local_r4k___flush_cache_all, NULL);
    346338}
    347339
    348340static inline void local_r4k_flush_cache_range(void * args)
    … …  
    363355static void r4k_flush_cache_range(struct vm_area_struct *vma,
    364356        unsigned long start, unsigned long end)
    365357{
    366         r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
     358        __on_each_core(local_r4k_flush_cache_range, vma);
    367359}
    368360
    369361static inline void local_r4k_flush_cache_mm(void * args)
    … …  
    392384        if (!cpu_has_dc_aliases)
    393385                return;
    394386
    395         r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
     387        __on_each_core(local_r4k_flush_cache_mm, mm);
    396388}
    397389
    398390struct flush_cache_page_args {
    … …  
    483475        args.addr = addr;
    484476        args.pfn = pfn;
    485477
    486         r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
     478        __on_each_core(local_r4k_flush_cache_page, &args);
    487479}
    488480
    489481static inline void local_r4k_flush_data_cache_page(void * addr)
    … …  
    493485
    494486static void r4k_flush_data_cache_page(unsigned long addr)
    495487{
    496         r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
     488        __on_each_core(local_r4k_flush_data_cache_page, (void *) addr);
    497489}
    498490
    499491struct flush_icache_range_args {
    … …  
    508500        unsigned long end = fir_args->end;
    509501
    510502        if (!cpu_has_ic_fills_f_dc) {
    511                 if (end - start > dcache_size) {
     503                if (end - start >= dcache_size) {
    512504                        r4k_blast_dcache();
    513505                } else {
    514506                        R4600_HIT_CACHEOP_WAR_IMPL;
    … …  
    536528        args.start = start;
    537529        args.end = end;
    538530
    539         r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
     531        __on_each_core(local_r4k_flush_icache_range, &args);
    540532        instruction_hazard();
    541533}
    542534
    … …  
    612604        args.vma = vma;
    613605        args.page = page;
    614606
    615         r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
     607        __on_each_core(local_r4k_flush_icache_page, &args);
    616608}
    617609
    618610
    … …  
    683675        unsigned long addr = (unsigned long) arg;
    684676
    685677        R4600_HIT_CACHEOP_WAR_IMPL;
    686         protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
     678        if (dc_lsize)
     679                protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
    687680        if (!cpu_icache_snoops_remote_store && scache_size)
    688681                protected_writeback_scache_line(addr & ~(sc_lsize - 1));
    689         protected_flush_icache_line(addr & ~(ic_lsize - 1));
     682        if (ic_lsize)
     683                protected_flush_icache_line(addr & ~(ic_lsize - 1));
    690684        if (MIPS4K_ICACHE_REFILL_WAR) {
    691685                __asm__ __volatile__ (
    692686                        ".set push\n\t"
    … …  
    711705
    712706static void r4k_flush_cache_sigtramp(unsigned long addr)
    713707{
    714         r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
     708        __on_each_core(local_r4k_flush_cache_sigtramp, (void *) addr);
    715709}
    716710
    717711static void r4k_flush_icache_all(void)
    … …  
    973967        c->icache.waysize = icache_size / c->icache.ways;
    974968        c->dcache.waysize = dcache_size / c->dcache.ways;
    975969
    976         c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways);
    977         c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways);
     970        c->icache.sets = c->icache.linesz ?
     971                icache_size / (c->icache.linesz * c->icache.ways) : 0;
     972        c->dcache.sets = c->dcache.linesz ?
     973                dcache_size / (c->dcache.linesz * c->dcache.ways) : 0;
    978974
    979975        /*
    980976         * R10000 and R12000 P-caches are odd in a positive way.  They're 32kB
    … …  
    993989                break;
    994990        case CPU_24K:
    995991        case CPU_34K:
    996                 if (!(read_c0_config7() & (1 << 16)))
     992                if ((read_c0_config7() & (1 << 16))) {
     993                        /* effectively physically indexed dcache,
     994                           thus no virtual aliases. */
     995                        c->dcache.flags |= MIPS_CACHE_PINDEX;
     996                        break;
     997                }
    997998        default:
    998                         if (c->dcache.waysize > PAGE_SIZE)
    999                                 c->dcache.flags |= MIPS_CACHE_ALIASES;
     999                if (c->dcache.waysize > PAGE_SIZE)
     1000                        c->dcache.flags |= MIPS_CACHE_ALIASES;
    10001001        }
    10011002
    10021003        switch (c->cputype) {
    … …  
    10921093
    10931094extern int r5k_sc_init(void);
    10941095extern int rm7k_sc_init(void);
     1096extern int mips_sc_init(void);
    10951097
    10961098static void __init setup_scache(void)
    10971099{
    … …  
    11391141                return;
    11401142
    11411143        default:
     1144                if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
     1145                    c->isa_level == MIPS_CPU_ISA_M32R2 ||
     1146                    c->isa_level == MIPS_CPU_ISA_M64R1 ||
     1147                    c->isa_level == MIPS_CPU_ISA_M64R2) {
     1148#ifdef CONFIG_MIPS_CPU_SCACHE
     1149                        if (mips_sc_init ()) {
     1150                                scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
     1151                                printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
     1152                                       scache_size >> 10,
     1153                                       way_string[c->scache.ways], c->scache.linesz);
     1154                        }
     1155#else
     1156                        if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
     1157                                panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
     1158#endif
     1159                        return;
     1160                }
    11421161                sc_present = 0;
    11431162        }
    11441163
    11451164        if (!sc_present)
    11461165                return;
    11471166
    1148         if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
    1149              c->isa_level == MIPS_CPU_ISA_M64R1) &&
    1150             !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
    1151                 panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
    1152 
    11531167        /* compute a couple of other cache variables */
    11541168        c->scache.waysize = scache_size / c->scache.ways;
    11551169
    … …  
    12461260         * This code supports virtually indexed processors and will be
    12471261         * unnecessarily inefficient on physically indexed processors.
    12481262         */
    1249         shm_align_mask = max_t( unsigned long,
    1250                                 c->dcache.sets * c->dcache.linesz - 1,
    1251                                 PAGE_SIZE - 1);
    1252 
     1263        if (c->dcache.linesz)
     1264                shm_align_mask = max_t( unsigned long,
     1265                                        c->dcache.sets * c->dcache.linesz - 1,
     1266                                        PAGE_SIZE - 1);
     1267        else
     1268                shm_align_mask = PAGE_SIZE-1;
    12531269        flush_cache_all         = r4k_flush_cache_all;
    12541270        __flush_cache_all       = r4k___flush_cache_all;
    12551271        flush_cache_mm          = r4k_flush_cache_mm;

  • arch/mips/mm/Makefile 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/mm/Makefile linux-2.6.17.4-mips/arch/mips/mm/Makefile
    old new  
    3030obj-$(CONFIG_IP22_CPU_SCACHE)   += sc-ip22.o
    3131obj-$(CONFIG_R5000_CPU_SCACHE)  += sc-r5k.o
    3232obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
     33obj-$(CONFIG_MIPS_CPU_SCACHE)   += sc-mips.o
    3334
    3435#
    3536# Choose one DMA coherency model

  • arch/mips/pci/fixup-tb0219.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/pci/fixup-tb0219.c linux-2.6.17.4-mips/arch/mips/pci/fixup-tb0219.c
    old new  
    22 *  fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
    33 *
    44 *  Copyright (C) 2003  Megasolution Inc. <matsu@megasolution.jp>
    5  *  Copyright (C) 2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
     5 *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
    66 *
    77 *  This program is free software; you can redistribute it and/or modify
    88 *  it under the terms of the GNU General Public License as published by

  • arch/mips/qemu/Makefile 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/qemu/Makefile linux-2.6.17.4-mips/arch/mips/qemu/Makefile
    old new  
    44
    55obj-y           = q-firmware.o q-irq.o q-mem.o q-setup.o
    66
     7obj-$(CONFIG_VT) += q-vga.o
    78obj-$(CONFIG_SMP) += q-smp.o

  • arch/mips/qemu/q-setup.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/qemu/q-setup.c linux-2.6.17.4-mips/arch/mips/qemu/q-setup.c
    old new  
    22#include <asm/io.h>
    33#include <asm/time.h>
    44
     5extern void qvga_init(void);
     6
    57#define QEMU_PORT_BASE 0xb4000000
    68
    79const char *get_system_type(void)
    … …  
    2123void __init plat_setup(void)
    2224{
    2325        set_io_port_base(QEMU_PORT_BASE);
     26#ifdef CONFIG_VT
     27        qvga_init();
     28#endif
    2429        board_timer_setup = qemu_timer_setup;
    2530}

  • arch/mips/sgi-ip27/ip27-irq.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sgi-ip27/ip27-irq.c linux-2.6.17.4-mips/arch/mips/sgi-ip27/ip27-irq.c
    old new  
    360360
    361361static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
    362362
    363 static int allocate_irqno(void)
     363int allocate_irqno(void)
    364364{
    365365        int irq;
    366366

  • arch/mips/sgi-ip27/ip27-timer.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sgi-ip27/ip27-timer.c linux-2.6.17.4-mips/arch/mips/sgi-ip27/ip27-timer.c
    old new  
    8989}
    9090#endif
    9191
     92static unsigned int rt_timer_irq;
     93
    9294void ip27_rt_timer_interrupt(struct pt_regs *regs)
    9395{
    9496        int cpu = smp_processor_id();
    9597        int cpuA = cputoslice(cpu) == 0;
    96         int irq = 9;                            /* XXX Assign number */
     98        unsigned int irq = rt_timer_irq;
    9799
    98100        irq_enter();
    99101        write_seqlock(&xtime_lock);
    … …  
    179181        return mktime(year, month, date, hour, min, sec);
    180182}
    181183
     184static void startup_rt_irq(unsigned int irq)
     185{
     186}
     187
     188static void shutdown_rt_irq(unsigned int irq)
     189{
     190}
     191
     192static void enable_rt_irq(unsigned int irq)
     193{
     194}
     195
     196static void disable_rt_irq(unsigned int irq)
     197{
     198}
     199
     200static void mask_and_ack_rt(unsigned int irq)
     201{
     202}
     203
     204static void end_rt_irq(unsigned int irq)
     205{
     206}
     207
     208static struct hw_interrupt_type rt_irq_type = {
     209        .typename       = "SN HUB RT timer",
     210        .startup        = startup_rt_irq,
     211        .shutdown       = shutdown_rt_irq,
     212        .enable         = enable_rt_irq,
     213        .disable        = disable_rt_irq,
     214        .ack            = mask_and_ack_rt,
     215        .end            = end_rt_irq,
     216};
     217
     218static struct irqaction rt_irqaction = {
     219        .handler        = ip27_rt_timer_interrupt,
     220        .flags          = SA_INTERRUPT,
     221        .mask           = CPU_MASK_NONE,
     222        .name           = "timer"
     223};
     224
     225extern int allocate_irqno(void);
     226
    182227static void ip27_timer_setup(struct irqaction *irq)
    183228{
     229        int irqno  = allocate_irqno();
     230
     231        if (irqno < 0)
     232                panic("Can't allocate interrupt number for timer interrupt");
     233
     234        irq_desc[irqno].status = IRQ_DISABLED;
     235        irq_desc[irqno].action = NULL;
     236        irq_desc[irqno].depth = 1;
     237        irq_desc[irqno].handler = &rt_irq_type;
     238
    184239        /* over-write the handler, we use our own way */
    185240        irq->handler = no_action;
    186241
    187242        /* setup irqaction */
    188 //      setup_irq(IP27_TIMER_IRQ, irq);         /* XXX Can't do this yet.  */
     243        irq_desc[irqno].status |= IRQ_PER_CPU;
     244
     245        rt_timer_irq = irqno;
    189246}
    190247
    191248void __init ip27_time_init(void)

  • arch/mips/sgi-ip27/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sgi-ip27/Kconfig linux-2.6.17.4-mips/arch/mips/sgi-ip27/Kconfig
    old new  
    3535        depends on SGI_IP27
    3636        help
    3737          Change the way a Linux kernel is loaded into memory on a MIPS64
    38           machine.  This is required in order to support text replication and
     38          machine.  This is required in order to support text replication on
    3939          NUMA.  If you need to understand it, read the source code.
    4040
    4141config REPLICATE_KTEXT
    4242        bool "Kernel text replication support"
    4343        depends on SGI_IP27
     44        select MAPPED_KERNEL
    4445        help
    4546          Say Y here to enable replicating the kernel text across multiple
    4647          nodes in a NUMA cluster.  This trades memory for speed.

  • arch/mips/sibyte/bcm1480/irq.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sibyte/bcm1480/irq.c linux-2.6.17.4-mips/arch/mips/sibyte/bcm1480/irq.c
    old new  
    503503#ifdef CONFIG_SIBYTE_BCM1480_PROF
    504504        if (pending & CAUSEF_IP7)       /* Cpu performance counter interrupt */
    505505                sbprof_cpu_intr(exception_epc(regs));
     506        else
    506507#endif
    507508
    508509        if (pending & CAUSEF_IP4)
    509510                bcm1480_timer_interrupt(regs);
    510511
    511512#ifdef CONFIG_SMP
    512         if (pending & CAUSEF_IP3)
     513        else if (pending & CAUSEF_IP3)
    513514                bcm1480_mailbox_interrupt(regs);
    514515#endif
    515516
    516517#ifdef CONFIG_KGDB
    517         if (pending & CAUSEF_IP6)
     518        else if (pending & CAUSEF_IP6)
    518519                bcm1480_kgdb_interrupt(regs);           /* KGDB (uart 1) */
    519520#endif
    520521
    521         if (pending & CAUSEF_IP2) {
     522        else if (pending & CAUSEF_IP2) {
    522523                unsigned long long mask_h, mask_l;
    523524                unsigned long base;
    524525
    … …  
    534535                mask_l = __raw_readq(
    535536                        IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L));
    536537
    537                 if (!mask_h) {
     538                if (mask_h) {
    538539                        if (mask_h ^ 1)
    539540                                do_IRQ(63 - dclz(mask_h), regs);
    540541                        else

  • arch/mips/sibyte/bcm1480/time.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sibyte/bcm1480/time.c linux-2.6.17.4-mips/arch/mips/sibyte/bcm1480/time.c
    old new  
    110110        __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
    111111              IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
    112112
    113         /*
    114          * CPU 0 handles the global timer interrupt job
    115          */
    116113        if (cpu == 0) {
     114                /*
     115                 * CPU 0 handles the global timer interrupt job
     116                 */
    117117                ll_timer_interrupt(irq, regs);
    118118        }
    119 
    120         /*
    121          * every CPU should do profiling and process accouting
    122          */
    123         ll_local_timer_interrupt(irq, regs);
     119        else {
     120                /*
     121                 * other CPUs should just do profiling and process accounting
     122                 */
     123                ll_local_timer_interrupt(irq, regs);
     124        }
    124125}
    125126
    126127/*

  • arch/mips/sibyte/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sibyte/Kconfig linux-2.6.17.4-mips/arch/mips/sibyte/Kconfig
    old new  
    33        select HW_HAS_PCI
    44        select SIBYTE_HAS_LDT
    55        select SIBYTE_SB1xxx_SOC
     6        select SYS_SUPPORTS_SMP
    67
    78config SIBYTE_BCM1120
    89        bool
    … …  
    3031        bool
    3132        select HW_HAS_PCI
    3233        select SIBYTE_SB1xxx_SOC
     34        select SYS_SUPPORTS_SMP
    3335
    3436config SIBYTE_BCM1x55
    3537        bool
    3638        select HW_HAS_PCI
    3739        select SIBYTE_SB1xxx_SOC
     40        select SYS_SUPPORTS_SMP
    3841
    3942config SIBYTE_SB1xxx_SOC
    4043        bool

  • arch/mips/sibyte/sb1250/irq.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sibyte/sb1250/irq.c linux-2.6.17.4-mips/arch/mips/sibyte/sb1250/irq.c
    old new  
    435435        return lz;
    436436}
    437437
     438extern void sb1250_timer_interrupt(struct pt_regs *regs);
     439extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
     440extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
     441
    438442asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
    439443{
    440444        unsigned int pending;
    441445
    442446#ifdef CONFIG_SIBYTE_SB1250_PROF
    443447        /* Set compare to count to silence count/compare timer interrupts */
    444         write_c0_count(read_c0_count());
     448        write_c0_compare(read_c0_count());
    445449#endif
    446450
    447451        /*
    … …  
    457461        pending = read_c0_cause();
    458462
    459463#ifdef CONFIG_SIBYTE_SB1250_PROF
    460         if (pending & CAUSEF_IP7) { /* Cpu performance counter interrupt */
     464        if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
    461465                sbprof_cpu_intr(exception_epc(regs));
    462         }
     466        else
    463467#endif
    464468
    465469        if (pending & CAUSEF_IP4)
    466470                sb1250_timer_interrupt(regs);
    467471
    468472#ifdef CONFIG_SMP
    469         if (pending & CAUSEF_IP3)
     473        else if (pending & CAUSEF_IP3)
    470474                sb1250_mailbox_interrupt(regs);
    471475#endif
    472476
    473477#ifdef CONFIG_KGDB
    474         if (pending & CAUSEF_IP6)                       /* KGDB (uart 1) */
     478        else if (pending & CAUSEF_IP6)                  /* KGDB (uart 1) */
    475479                sb1250_kgdb_interrupt(regs);
    476480#endif
    477481
    478         if (pending & CAUSEF_IP2) {
     482        else if (pending & CAUSEF_IP2) {
    479483                unsigned long long mask;
    480484
    481485                /*
    482486                 * Default...we've hit an IP[2] interrupt, which means we've
    483487                 * got to check the 1250 interrupt registers to figure out what
    484488                 * to do.  Need to detect which CPU we're on, now that
    485                  ~ smp_affinity is supported.
     489                 * smp_affinity is supported.
    486490                 */
    487491                mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
    488492                                              R_IMR_INTERRUPT_STATUS_BASE)));

  • arch/mips/sibyte/swarm/setup.c 

    diff -Naur linux-2.6.17.4-kernel/arch/mips/sibyte/swarm/setup.c linux-2.6.17.4-mips/arch/mips/sibyte/swarm/setup.c
    old new  
    7272
    7373void __init swarm_time_init(void)
    7474{
     75#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
    7576        /* Setup HPT */
    7677        sb1250_hpt_setup();
     78#endif
    7779}
    7880
    7981void __init swarm_timer_setup(struct irqaction *irq)

  • Documentation/feature-removal-schedule.txt 

    diff -Naur linux-2.6.17.4-kernel/Documentation/feature-removal-schedule.txt linux-2.6.17.4-mips/Documentation/feature-removal-schedule.txt
    old new  
    147147
    148148---------------------------
    149149
    150 What:   au1x00_uart driver
    151 When:   January 2006
    152 Why:    The 8250 serial driver now has the ability to deal with the differences
    153         between the standard 8250 family of UARTs and their slightly strange
    154         brother on Alchemy SOCs.  The loss of features is not considered an
    155         issue.
    156 Who:    Ralf Baechle <ralf@linux-mips.org>
    157 
    158 ---------------------------
    159 
    160150What:   eepro100 network driver
    161151When:   January 2007
    162152Why:    replaced by the e100 driver

  • drivers/char/decserial.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/char/decserial.c linux-2.6.17.4-mips/drivers/char/decserial.c
    old new  
    1414 *      device. Added support for PROM console in drivers/char/tty_io.c
    1515 *      instead. Although it may work to enable more than one
    1616 *      console device I strongly recommend to use only one.
     17 *
     18 *      Copyright (C) 2004  Maciej W. Rozycki
    1719 */
    1820
    1921#include <linux/config.h>
     22#include <linux/errno.h>
    2023#include <linux/init.h>
    21 #include <asm/dec/machtype.h>
    22 
    23 #ifdef CONFIG_ZS
    24 extern int zs_init(void);
    25 #endif
    2624
    27 #ifdef CONFIG_DZ
    28 extern int dz_init(void);
    29 #endif
     25#include <asm/dec/machtype.h>
     26#include <asm/dec/serial.h>
    3027
    31 #ifdef CONFIG_SERIAL_CONSOLE
     28extern int register_zs_hook(unsigned int channel,
     29                            struct dec_serial_hook *hook);
     30extern int unregister_zs_hook(unsigned int channel);
    3231
     32int register_dec_serial_hook(unsigned int channel,
     33                             struct dec_serial_hook *hook)
     34{
    3335#ifdef CONFIG_ZS
    34 extern void zs_serial_console_init(void);
    35 #endif
    36 
    37 #ifdef CONFIG_DZ
    38 extern void dz_serial_console_init(void);
     36        if (IOASIC)
     37                return register_zs_hook(channel, hook);
    3938#endif
     39        return 0;
     40}
    4041
     42int unregister_dec_serial_hook(unsigned int channel)
     43{
     44#ifdef CONFIG_ZS
     45        if (IOASIC)
     46                return unregister_zs_hook(channel);
    4147#endif
     48        return 0;
     49}
    4250
    43 /* rs_init - starts up the serial interface -
    44    handle normal case of starting up the serial interface */
    4551
    46 #ifdef CONFIG_SERIAL
     52extern int zs_init(void);
     53extern int dz_init(void);
    4754
     55/*
     56 * rs_init - starts up the serial interface -
     57 * handle normal case of starting up the serial interface
     58 */
    4859int __init rs_init(void)
    4960{
    50 
    51 #if defined(CONFIG_ZS) && defined(CONFIG_DZ)
    52     if (IOASIC)
    53         return zs_init();
    54     else
    55         return dz_init();
    56 #else
    57 
    5861#ifdef CONFIG_ZS
    59     return zs_init();
     62        if (IOASIC)
     63                return zs_init();
    6064#endif
    61 
    6265#ifdef CONFIG_DZ
    63     return dz_init();
    64 #endif
    65 
     66        if (!IOASIC)
     67                return dz_init();
    6668#endif
     69        return -ENXIO;
    6770}
    6871
    6972__initcall(rs_init);
    7073
    71 #endif
    7274
    73 #ifdef CONFIG_SERIAL_CONSOLE
     75#ifdef CONFIG_SERIAL_DEC_CONSOLE
     76
     77extern void zs_serial_console_init(void);
     78extern void dz_serial_console_init(void);
    7479
    75 /* serial_console_init handles the special case of starting
    76  *   up the console on the serial port
     80/*
     81 * dec_serial_console_init handles the special case of starting
     82 * up the console on the serial port
    7783 */
    78 static int __init decserial_console_init(void)
     84static int __init dec_serial_console_init(void)
    7985{
    80 #if defined(CONFIG_ZS) && defined(CONFIG_DZ)
    81     if (IOASIC)
    82         zs_serial_console_init();
    83     else
    84         dz_serial_console_init();
    85 #else
    86 
    8786#ifdef CONFIG_ZS
    88     zs_serial_console_init();
     87        if (IOASIC)
     88                zs_serial_console_init();
    8989#endif
    90 
    9190#ifdef CONFIG_DZ
    92     dz_serial_console_init();
    93 #endif
    94 
     91        if (!IOASIC)
     92                dz_serial_console_init();
    9593#endif
    9694    return 0;
    9795}
    98 console_initcall(decserial_console_init);
     96console_initcall(dec_serial_console_init);
    9997
    10098#endif

  • drivers/char/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/char/Kconfig linux-2.6.17.4-mips/drivers/char/Kconfig
    old new  
    340340          To compile this driver as a module, choose M here: the
    341341          module will be called istallion.
    342342
    343 config AU1000_UART
    344         bool "Enable Au1000 UART Support"
    345         depends on SERIAL_NONSTANDARD && MIPS
    346         help
    347           If you have an Alchemy AU1000 processor (MIPS based) and you want
    348           to use serial ports, say Y.  Otherwise, say N.
    349 
    350 config AU1000_SERIAL_CONSOLE
    351         bool "Enable Au1000 serial console"
    352         depends on AU1000_UART
     343config AU1X00_GPIO
     344        tristate "Alchemy Au1000 GPIO device support"
     345        depends on MIPS && SOC_AU1X00
     346
     347config TS_AU1X00_ADS7846
     348        tristate "Au1000/ADS7846 touchscreen support"
     349        depends on MIPS && SOC_AU1X00
     350
     351config AU1X00_USB_TTY
     352        tristate "Au1000 USB TTY Device support"
     353        depends on MIPS && MIPS_AU1000 && AU1000_USB_DEVICE=y && AU1000_USB_DEVICE
     354
     355config AU1X00_USB_RAW
     356        tristate "Au1000 USB Raw Device support"
     357        depends on MIPS && MIPS_AU1000 && AU1000_USB_DEVICE=y && AU1000_USB_TTY!=y && AU1X00_USB_DEVICE
     358
     359config SIBYTE_SB1250_DUART
     360        bool "Support for BCM1xxx onchip DUART"
     361        depends on MIPS && SIBYTE_SB1xxx_SOC=y
     362
     363config SIBYTE_SB1250_DUART_CONSOLE
     364        bool "Console on BCM1xxx DUART"
     365        depends on SIBYTE_SB1250_DUART
     366
     367config SERIAL_DEC
     368        bool "DECstation serial support"
     369        depends on MACH_DECSTATION
     370        default y
    353371        help
    354           If you have an Alchemy AU1000 processor (MIPS based) and you want
    355           to use a console on a serial port, say Y.  Otherwise, say N.
     372          This selects whether you want to be asked about drivers for
     373          DECstation serial ports.
     374
     375          Note that the answer to this question won't directly affect the
     376          kernel: saying N will just cause the configurator to skip all
     377          the questions about DECstation serial ports.
     378
     379          If unsure, say Y.
     380
     381config SERIAL_DEC_CONSOLE
     382        bool "Support for console on a DECstation serial port"
     383        depends on SERIAL_DEC
     384        default y
     385        help
     386          If you say Y here, it will be possible to use a serial port as the
     387          system console (the system console is the device which receives all
     388          kernel messages and warnings and which allows logins in single user
     389          mode).  Note that the firmware uses ttyS0 as the serial console on
     390          the Maxine and ttyS2 on the others.
     391
     392          If unsure, say Y.
     393
     394config ZS
     395        bool "Z85C30 Serial Support"
     396        depends on SERIAL_DEC
     397        default y
     398        help
     399          Documentation on the Zilog 85C350 serial communications controller
     400          is downloadable at <http://www.zilog.com/pdfs/serial/z85c30.pdf>.
    356401
    357402config QTRONIX_KEYBOARD
    358403        bool "Enable Qtronix 990P Keyboard Support"
    359         depends on IT8712
     404        depends on MIPS && (MIPS_ITE8172 || MIPS_IVR)
    360405        help
    361406          Images of Qtronix keyboards are at
    362407          <http://www.qtronix.com/keyboard.html>.
    … …  
    368413
    369414config IT8172_SCR0
    370415        bool "Enable Smart Card Reader 0 Support "
    371         depends on IT8712
     416        depends on MIPS && (MIPS_ITE8172 || MIPS_IVR)
    372417        help
    373418          Say Y here to support smart-card reader 0 (SCR0) on the Integrated
    374419          Technology Express, Inc. ITE8172 SBC.  Vendor page at
    … …  
    377422
    378423config IT8172_SCR1
    379424        bool "Enable Smart Card Reader 1 Support "
    380         depends on IT8712
     425        depends on MIPS && (MIPS_ITE8172 || MIPS_IVR)
    381426        help
    382427          Say Y here to support smart-card reader 1 (SCR1) on the Integrated
    383428          Technology Express, Inc. ITE8172 SBC.  Vendor page at
    384429          <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
    385430          board at <http://www.mvista.com/partners/semiconductor/ite.html>.
    386431
     432config ITE_GPIO
     433        tristate "ITE GPIO"
     434        depends on MIPS && MIPS_ITE8172
     435
    387436config A2232
    388437        tristate "Commodore A2232 serial support (EXPERIMENTAL)"
    389438        depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP

  • drivers/char/Makefile 

    diff -Naur linux-2.6.17.4-kernel/drivers/char/Makefile linux-2.6.17.4-mips/drivers/char/Makefile
    old new  
    3131obj-$(CONFIG_A2232)             += ser_a2232.o generic_serial.o
    3232obj-$(CONFIG_ATARI_DSP56K)      += dsp56k.o
    3333obj-$(CONFIG_MOXA_SMARTIO)      += mxser.o
     34obj-$(CONFIG_SIBYTE_SB1250_DUART) += sb1250_duart.o
    3435obj-$(CONFIG_COMPUTONE)         += ip2/
    3536obj-$(CONFIG_RISCOM8)           += riscom8.o
    3637obj-$(CONFIG_ISI)               += isicom.o
    … …  
    5152obj-$(CONFIG_VIOTAPE)           += viotape.o
    5253obj-$(CONFIG_HVCS)              += hvcs.o
    5354obj-$(CONFIG_SGI_MBCS)          += mbcs.o
     55obj-$(CONFIG_SERIAL_DEC)        += decserial.o
    5456
    5557obj-$(CONFIG_PRINTER)           += lp.o
    5658obj-$(CONFIG_TIPAR)             += tipar.o
    … …  
    7880obj-$(CONFIG_HW_RANDOM)         += hw_random.o
    7981obj-$(CONFIG_FTAPE)             += ftape/
    8082obj-$(CONFIG_COBALT_LCD)        += lcd.o
     83obj-$(CONFIG_ITE_GPIO)          += ite_gpio.o
     84obj-$(CONFIG_AU1000_GPIO)       += au1000_gpio.o
     85obj-$(CONFIG_AU1000_USB_TTY)    += au1000_usbtty.o
     86obj-$(CONFIG_AU1000_USB_RAW)    += au1000_usbraw.o
    8187obj-$(CONFIG_PPDEV)             += ppdev.o
    8288obj-$(CONFIG_NWBUTTON)          += nwbutton.o
    8389obj-$(CONFIG_NWFLASH)           += nwflash.o

  • drivers/char/qtronix.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/char/qtronix.c linux-2.6.17.4-mips/drivers/char/qtronix.c
    old new  
    535535                i--;
    536536        }
    537537        if (count-i) {
    538                 struct inode *inode = file->f_dentry->d_inode;
    539                 inode->i_atime = current_fs_time(inode->i_sb);
     538                file->f_dentry->d_inode->i_atime = get_seconds();
    540539                return count-i;
    541540        }
    542541        if (signal_pending(current))

  • drivers/char/rtc.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/char/rtc.c linux-2.6.17.4-mips/drivers/char/rtc.c
    old new  
    3535 *      1.09a   Pete Zaitcev: Sun SPARC
    3636 *      1.09b   Jeff Garzik: Modularize, init cleanup
    3737 *      1.09c   Jeff Garzik: SMP cleanup
    38  *      1.10    Paul Barton-Davis: add support for async I/O
     38 *      1.10    Paul Barton-Davis: add support for async I/O
    3939 *      1.10a   Andrea Arcangeli: Alpha updates
    4040 *      1.10b   Andrew Morton: SMP lock fix
    4141 *      1.10c   Cesar Barros: SMP locking fixes and cleanup
    4242 *      1.10d   Paul Gortmaker: delete paranoia check in rtc_exit
    4343 *      1.10e   Maciej W. Rozycki: Handle DECstation's year weirdness.
    44  *      1.11    Takashi Iwai: Kernel access functions
     44 *      1.11    Takashi Iwai: Kernel access functions
    4545 *                            rtc_register/rtc_unregister/rtc_control
    4646 *      1.11a   Daniele Bellucci: Audit create_proc_read_entry in rtc_init
    47  *      1.12    Venkatesh Pallipadi: Hooks for emulating rtc on HPET base-timer
     47 *      1.12    Venkatesh Pallipadi: Hooks for emulating rtc on HPET base-timer
    4848 *              CONFIG_HPET_EMULATE_RTC
     49 *      1.12a   Maciej W. Rozycki: Handle memory-mapped chips properly.
    4950 *      1.12ac  Alan Cox: Allow read access to the day of week register
    5051 */
    5152
    52 #define RTC_VERSION             "1.12ac"
    53 
    54 #define RTC_IO_EXTENT   0x8
     53#define RTC_VERSION             "1.12a"
    5554
    5655/*
    5756 *      Note that *all* calls to CMOS_READ and CMOS_WRITE are done with
    … …  
    338337        if (rtc_has_irq == 0)
    339338                return -EIO;
    340339
    341         if (count < sizeof(unsigned))
     340        /*
     341         * Historically this function used to assume that sizeof(unsigned long)
     342         * is the same in userspace and kernelspace.  This lead to problems
     343         * for configurations with multiple ABIs such a the MIPS o32 and 64
     344         * ABIs supported on the same kernel.  So now we support read of both
     345         * 4 and 8 bytes and assume that's the sizeof(unsigned long) in the
     346         * userspace ABI.
     347         */
     348        if (count != sizeof(unsigned int) && count !=  sizeof(unsigned long))
    342349                return -EINVAL;
    343350
    344351        add_wait_queue(&rtc_wait, &wait);
    … …  
    369376                schedule();
    370377        } while (1);
    371378
    372         if (count < sizeof(unsigned long))
    373                 retval = put_user(data, (unsigned int __user *)buf) ?: sizeof(int); 
     379        if (count == sizeof(unsigned int))
     380                retval = put_user(data, (unsigned int __user *)buf) ?: sizeof(int);
    374381        else
    375382                retval = put_user(data, (unsigned long __user *)buf) ?: sizeof(long);
     383        if (!retval)
     384                retval = count;
    376385 out:
    377386        current->state = TASK_RUNNING;
    378387        remove_wait_queue(&rtc_wait, &wait);
    … …  
    924933        struct sparc_isa_device *isa_dev;
    925934#endif
    926935#endif
     936#ifndef __sparc__
     937        void *r;
     938#endif
    927939
    928940#ifdef __sparc__
    929941        for_each_ebus(ebus) {
    … …  
    969981        }
    970982no_irq:
    971983#else
    972         if (!request_region(RTC_PORT(0), RTC_IO_EXTENT, "rtc")) {
    973                 printk(KERN_ERR "rtc: I/O port %d is not free.\n", RTC_PORT (0));
     984        if (RTC_IOMAPPED)
     985                r = request_region(RTC_PORT(0), RTC_IO_EXTENT, "rtc");
     986        else
     987                r = request_mem_region(RTC_PORT(0), RTC_IO_EXTENT, "rtc");
     988        if (!r) {
     989                printk(KERN_ERR "rtc: I/O resource %lx is not free.\n",
     990                       (long)(RTC_PORT(0)));
    974991                return -EIO;
    975992        }
    976993
    … …  
    9841001        if(request_irq(RTC_IRQ, rtc_int_handler_ptr, SA_INTERRUPT, "rtc", NULL)) {
    9851002                /* Yeah right, seeing as irq 8 doesn't even hit the bus. */
    9861003                printk(KERN_ERR "rtc: IRQ %d is not free.\n", RTC_IRQ);
    987                 release_region(RTC_PORT(0), RTC_IO_EXTENT);
     1004                if (RTC_IOMAPPED)
     1005                        release_region(RTC_PORT(0), RTC_IO_EXTENT);
     1006                else
     1007                        release_mem_region(RTC_PORT(0), RTC_IO_EXTENT);
    9881008                return -EIO;
    9891009        }
    9901010        hpet_rtc_timer_init();
    … …  
    10841104        if (rtc_has_irq)
    10851105                free_irq (rtc_irq, &rtc_port);
    10861106#else
    1087         release_region (RTC_PORT (0), RTC_IO_EXTENT);
     1107        if (RTC_IOMAPPED)
     1108                release_region(RTC_PORT(0), RTC_IO_EXTENT);
     1109        else
     1110                release_mem_region(RTC_PORT(0), RTC_IO_EXTENT);
    10881111#ifdef RTC_IRQ
    10891112        if (rtc_has_irq)
    10901113                free_irq (RTC_IRQ, NULL);

  • drivers/ide/mips/Makefile 

    diff -Naur linux-2.6.17.4-kernel/drivers/ide/mips/Makefile linux-2.6.17.4-mips/drivers/ide/mips/Makefile
    old new  
    11obj-$(CONFIG_BLK_DEV_IDE_SWARM)         += swarm.o
    22obj-$(CONFIG_BLK_DEV_IDE_AU1XXX)        += au1xxx-ide.o
    33
    4 EXTRA_CFLAGS    := -Idrivers/ide
     4CFLAGS_au1xxx-ide.o := -Idrivers/ide

  • drivers/mtd/devices/docprobe.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/mtd/devices/docprobe.c linux-2.6.17.4-mips/drivers/mtd/devices/docprobe.c
    old new  
    8484        0xe4000000,
    8585#elif defined(CONFIG_MOMENCO_OCELOT)
    8686        0x2f000000,
    87         0xff000000,
     87        0xff000000,
    8888#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
    89         0xff000000,
    90 ##else
     89        0xff000000,
     90#else
    9191#warning Unknown architecture for DiskOnChip. No default probe locations defined
    9292#endif
    9393        0xffffffff };

  • drivers/mtd/devices/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/mtd/devices/Kconfig linux-2.6.17.4-mips/drivers/mtd/devices/Kconfig
    old new  
    4747          accelerator.  Say Y here if you have a DECstation 5000/2x0 or a
    4848          DECsystem 5900 equipped with such a module.
    4949
     50          If you want to compile this driver as a module ( = code which can be
     51          inserted in and removed from the running kernel whenever you want),
     52          say M here and read <file:Documentation/modules.txt>.  The module will
     53          be called ms02-nv.o.
     54
    5055config MTD_DATAFLASH
    5156        tristate "Support for AT45xxx DataFlash"
    5257        depends on MTD && SPI_MASTER && EXPERIMENTAL

  • drivers/mtd/maps/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/mtd/maps/Kconfig linux-2.6.17.4-mips/drivers/mtd/maps/Kconfig
    old new  
    200200          Support for the flash chip on Tsunami TIG bus.
    201201
    202202config MTD_LASAT
    203         tristate "Flash chips on LASAT board"
    204         depends on LASAT
     203        tristate "LASAT flash device"
     204        depends on LASAT && MTD_CFI
    205205        help
    206206          Support for the flash chips on the Lasat 100 and 200 boards.
    207207
    … …  
    299299          Mapping for the Flaga digital module. If you don't have one, ignore
    300300          this setting.
    301301
     302config MTD_XXS1500
     303        tristate "MyCable XXS1500 Flash device"
     304        depends on MIPS && MIPS_XXS1500
     305        help
     306          Flash memory access on MyCable XXS1500 Board
     307
     308config MTD_MTX1
     309        tristate "4-G Systems MTX-1 Flash device"
     310        depends on MIPS && MIPS_MTX1
     311        help
     312          Flash memory access on 4-G Systems MTX-1 Board
     313
    302314config MTD_BEECH
    303315        tristate "CFI Flash device mapped on IBM 405LP Beech"
    304316        depends on MTD_CFI && BEECH

  • drivers/mtd/maps/lasat.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/mtd/maps/lasat.c linux-2.6.17.4-mips/drivers/mtd/maps/lasat.c
    old new  
    77 * modify it under the terms of the GNU General Public License version
    88 * 2 as published by the Free Software Foundation.
    99 *
    10  * $Id: lasat.c,v 1.9 2004/11/04 13:24:15 gleixner Exp $
     10 * $Id: lasat.c,v 1.7 2004/07/12 21:59:44 dwmw2 Exp $
    1111 *
    1212 */
    1313
    … …  
    5050        ENABLE_VPP((&lasat_map));
    5151
    5252        lasat_map.phys = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
    53         lasat_map.virt = ioremap_nocache(
     53        lasat_map.virt = (unsigned long)ioremap_nocache(
    5454                        lasat_map.phys, lasat_board_info.li_flash_size);
    5555        lasat_map.size = lasat_board_info.li_flash_size;
    5656

  • drivers/net/declance.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/net/declance.c linux-2.6.17.4-mips/drivers/net/declance.c
    old new  
    704704        return IRQ_HANDLED;
    705705}
    706706
    707 static irqreturn_t
    708 lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
     707static irqreturn_t lance_interrupt(const int irq, void *dev_id,
     708                                  struct pt_regs *regs)
    709709{
    710710        struct net_device *dev = (struct net_device *) dev_id;
    711711        struct lance_private *lp = netdev_priv(dev);
    … …  
    12551255        return 0;
    12561256
    12571257err_out_free_dev:
    1258         kfree(dev);
     1258        free_netdev(dev);
    12591259
    12601260err_out:
    12611261        return ret;
    … …  
    13011301        while (root_lance_dev) {
    13021302                struct net_device *dev = root_lance_dev;
    13031303                struct lance_private *lp = netdev_priv(dev);
     1304
    13041305                unregister_netdev(dev);
    13051306#ifdef CONFIG_TC
    13061307                if (lp->slot >= 0)

  • drivers/net/gt64240eth.h 

    diff -Naur linux-2.6.17.4-kernel/drivers/net/gt64240eth.h linux-2.6.17.4-mips/drivers/net/gt64240eth.h
    old new  
    99 * Copyright 2000 MontaVista Software Inc.
    1010 * Author: MontaVista Software, Inc.
    1111 *              stevel@mvista.com or support@mvista.com
     12 * Copyright 2004, 05 Ralf Baechle (ralf@linux-mips.org)
    1213 *
    1314 *  This program is free software; you can distribute it and/or modify it
    1415 *  under the terms of the GNU General Public License (Version 2) as
    … …  
    3132#ifndef _GT64240ETH_H
    3233#define _GT64240ETH_H
    3334
     35#include <linux/config.h>
    3436#include <asm/gt64240.h>
    3537
    3638#define ETHERNET_PORTS_DIFFERENCE_OFFSETS       0x400
    … …  
    108110#define REV_GT64240A 0x10
    109111
    110112#define GT64240ETH_READ(gp, offset)                                     \
    111         GT_READ((gp)->port_offset + (offset))
     113        MV_READ((gp)->port_offset + (offset))
    112114
    113115#define GT64240ETH_WRITE(gp, offset, data)                              \
    114         GT_WRITE((gp)->port_offset + (offset), (data))
     116        MV_WRITE((gp)->port_offset + (offset), (data))
    115117
    116118#define GT64240ETH_SETBIT(gp, offset, bits)                             \
    117119        GT64240ETH_WRITE((gp), (offset),                                \
    … …  
    121123        GT64240ETH_WRITE((gp), (offset),                                \
    122124                         GT64240ETH_READ((gp), (offset)) & ~(bits))
    123125
    124 #define GT64240_READ(ofs)               GT_READ(ofs)
    125 #define GT64240_WRITE(ofs, data)        GT_WRITE((ofs), (data))
     126#define GT64240_READ(ofs)               MV_READ(ofs)
     127#define GT64240_WRITE(ofs, data)        MV_WRITE((ofs), (data))
    126128
    127129/* Bit definitions of the SMI Reg */
    128130enum {

  • drivers/net/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/net/Kconfig linux-2.6.17.4-mips/drivers/net/Kconfig
    old new  
    438438          This is the driver for the onboard card of MIPS Magnum 4000,
    439439          Acer PICA, Olivetti M700-10 and a few other identical OEM systems.
    440440
     441config GALILEO_64240_ETH
     442        tristate "Galileo GT64240 Ethernet support"
     443        depends on NET_ETHERNET && MOMENCO_OCELOT_G
     444        select MII
     445        help
     446          This is the driver for the ethernet interfaces integrated into
     447          the Galileo (now Marvell) GT64240 chipset.
     448
    441449config MIPS_GT96100ETH
    442450        bool "MIPS GT96100 Ethernet support"
    443451        depends on NET_ETHERNET && MIPS_GT96100
    … …  
    452460          If you have an Alchemy Semi AU1X00 based system
    453461          say Y.  Otherwise, say N.
    454462
    455 config NET_SB1250_MAC
    456         tristate "SB1250 Ethernet support"
    457         depends on NET_ETHERNET && SIBYTE_SB1xxx_SOC
    458 
    459463config SGI_IOC3_ETH
    460464        bool "SGI IOC3 Ethernet"
    461465        depends on NET_ETHERNET && PCI && SGI_IP27
    … …  
    494498          emulated by the MIPS Simulator.
    495499          If you are not using a MIPSsim or are unsure, say N.
    496500
     501config MIPS_SIM_NET
     502        tristate "MIPS simulator Network device (EXPERIMENTAL)"
     503        depends on NETDEVICES && MIPS_SIM && EXPERIMENTAL
     504        help
     505          The MIPSNET device is a simple Ethernet network device which is
     506          emulated by the MIPS Simulator.
     507          If you are not using a MIPSsim or are unsure, say N.
     508
    497509config SGI_O2MACE_ETH
    498510        tristate "SGI O2 MACE Fast Ethernet support"
    499511        depends on NET_ETHERNET && SGI_IP32=y
    … …  
    19932005
    19942006          If in doubt, say N.
    19952007
     2008config NET_SB1250_MAC
     2009        tristate "SB1250 Ethernet support"
     2010        depends on SIBYTE_SB1xxx_SOC
     2011
    19962012config R8169_VLAN
    19972013        bool "VLAN support"
    19982014        depends on R8169 && VLAN_8021Q
    … …  
    21952211        select MII
    21962212        help
    21972213          This driver supports the gigabit Ethernet on the Marvell MV643XX
    2198           chipset which is used in the Momenco Ocelot C and Jaguar ATX and
    2199           Pegasos II, amongst other PPC and MIPS boards.
     2214          chipset which is used in the Momenco Ocelot C Ocelot, Jaguar ATX
     2215          and Pegasos II, amongst other PPC and MIPS boards.
    22002216
    22012217config MV643XX_ETH_0
    22022218        bool "MV-643XX Port 0"
    … …  
    22192235          This enables support for Port 2 of the Marvell MV643XX Gigabit
    22202236          Ethernet.
    22212237
     2238config BIG_SUR_FE
     2239        bool "PMC-Sierra TITAN Fast Ethernet Support"
     2240        depends on NET_ETHERNET && PMC_BIG_SUR
     2241        help
     2242          This enables support for the the integrated ethernet of
     2243          PMC-Sierra's Big Sur SoC.
     2244
     2245config TITAN_GE
     2246        bool "PMC-Sierra TITAN Gigabit Ethernet Support"
     2247        depends on PMC_YOSEMITE
     2248        help
     2249          This enables support for the the integrated ethernet of
     2250          PMC-Sierra's Titan SoC.
     2251
    22222252endmenu
    22232253
    22242254#

  • drivers/net/Makefile 

    diff -Naur linux-2.6.17.4-kernel/drivers/net/Makefile linux-2.6.17.4-mips/drivers/net/Makefile
    old new  
    111111
    112112obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
    113113
     114obj-$(CONFIG_GALILEO_64240_ETH) += gt64240eth.o
     115obj-$(CONFIG_MV64340_ETH) += mv64340_eth.o
     116obj-$(CONFIG_BIG_SUR_FE) += big_sur_ge.o
     117obj-$(CONFIG_TITAN_GE) += titan_mdio.o titan_ge.o
     118
    114119obj-$(CONFIG_PPP) += ppp_generic.o slhc.o
    115120obj-$(CONFIG_PPP_ASYNC) += ppp_async.o
    116121obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o

  • drivers/net/sb1250-mac.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/net/sb1250-mac.c linux-2.6.17.4-mips/drivers/net/sb1250-mac.c
    old new  
    156156
    157157#define NUMCACHEBLKS(x) (((x)+SMP_CACHE_BYTES-1)/SMP_CACHE_BYTES)
    158158
     159#define SBMAC_READCSR(t)        __raw_readq((unsigned long)t)
     160#define SBMAC_WRITECSR(t,v)     __raw_writeq(v, (unsigned long)t)
     161
     162
    159163#define SBMAC_MAX_TXDESCR       32
    160164#define SBMAC_MAX_RXDESCR       32
    161165
    … …  
    24162420                        sc->sbm_dev->name);
    24172421        }
    24182422
     2423        if (periph_rev >= 2) {
     2424                printk(KERN_INFO "%s: enabling TCP rcv checksum\n",
     2425                        sc->sbm_dev->name);
     2426        }
     2427
    24192428        /*
    24202429         * Display Ethernet address (this is called during the config
    24212430         * process so we need to finish off the config message that

  • drivers/scsi/dec_esp.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/scsi/dec_esp.c linux-2.6.17.4-mips/drivers/scsi/dec_esp.c
    old new  
    5555
    5656static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
    5757static void dma_drain(struct NCR_ESP *esp);
    58 static int  dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd *sp);
     58static int  dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd * sp);
    5959static void dma_dump_state(struct NCR_ESP *esp);
    6060static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
    6161static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
    … …  
    230230                        mem_start = get_tc_base_addr(slot);
    231231
    232232                        /* Store base addr into esp struct */
    233                         esp->slot = CPHYSADDR(mem_start);
     233                        esp->slot = mem_start;
    234234
    235235                        esp->dregs = 0;
    236236                        esp->eregs = (void *)CKSEG1ADDR(mem_start +

  • drivers/scsi/NCR53C9x.h 

    diff -Naur linux-2.6.17.4-kernel/drivers/scsi/NCR53C9x.h linux-2.6.17.4-mips/drivers/scsi/NCR53C9x.h
    old new  
    145145
    146146#ifndef MULTIPLE_PAD_SIZES
    147147
    148 #ifdef CONFIG_CPU_HAS_WB
    149 #include <asm/wbflush.h>
    150 #define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
    151 #else
    152 #define esp_write(__reg, __val) ((__reg) = (__val))
    153 #endif
     148#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
    154149#define esp_read(__reg) (__reg)
    155150
    156151struct ESP_regs {

  • drivers/scsi/sgiwd93.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/scsi/sgiwd93.c linux-2.6.17.4-mips/drivers/scsi/sgiwd93.c
    old new  
    1414#include <linux/interrupt.h>
    1515#include <linux/types.h>
    1616#include <linux/mm.h>
     17#include <linux/module.h>
    1718#include <linux/blkdev.h>
    1819#include <linux/delay.h>
    1920#include <linux/dma-mapping.h>
    … …  
    197198        udelay(50);
    198199        hregs->ctrl = 0;
    199200}
     201EXPORT_SYMBOL_GPL(sgiwd93_reset);
    200202
    201203static inline void init_hpc_chain(struct hpc_data *hd)
    202204{

  • drivers/serial/ip22zilog.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/serial/ip22zilog.c linux-2.6.17.4-mips/drivers/serial/ip22zilog.c
    old new  
    866866        up->cflag = termios->c_cflag;
    867867
    868868        ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
     869        uart_update_timeout(port, termios->c_cflag, baud);
    869870
    870871        spin_unlock_irqrestore(&up->port.lock, flags);
    871872}
    … …  
    10271028        }
    10281029
    10291030        con->cflag = cflag | CS8;                       /* 8N1 */
     1031
     1032        uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
    10301033}
    10311034
    10321035static int __init ip22zilog_console_setup(struct console *con, char *options)

  • drivers/serial/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/serial/Kconfig linux-2.6.17.4-mips/drivers/serial/Kconfig
    old new  
    647647        depends on SERIAL_SH_SCI=y
    648648        select SERIAL_CORE_CONSOLE
    649649
     650config SERIAL_IP3106
     651        bool "Enable IP3106 UART Support (Philips PNX 8xx0 SoCs)"
     652        depends on MIPS && (SOC_PNX8550 || SOC_PNX8330)
     653        select SERIAL_CORE
     654        help
     655          If you have a Philips SoC with an IP 3106 UART in it, such as
     656          the PNX8550 or PNX8330 (MIPS based) and you want to use
     657          serial ports, say Y.  Otherwise, say N.
     658
     659config SERIAL_IP3106_CONSOLE
     660        bool "Enable PNX8XX0 serial console"
     661        depends on SERIAL_IP3106
     662        select SERIAL_CORE_CONSOLE
     663        help
     664          If you have a Philips SoC with an IP 3106 UART in it, such as
     665          the PNX8550 or PNX8330 (MIPS based) and you want to use
     666          a serial console, say Y.
     667          Otherwise, say N.
     668
    650669config SERIAL_CORE
    651670        tristate
    652671

  • drivers/serial/Makefile 

    diff -Naur linux-2.6.17.4-kernel/drivers/serial/Makefile linux-2.6.17.4-mips/drivers/serial/Makefile
    old new  
    3939obj-$(CONFIG_V850E_UART) += v850e_uart.o
    4040obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o
    4141obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
     42obj-$(CONFIG_SERIAL_IP3106) += ip3106_uart.o
    4243obj-$(CONFIG_SERIAL_DZ) += dz.o
    4344obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
    4445obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o

  • drivers/usb/gadget/net2280.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/usb/gadget/net2280.c linux-2.6.17.4-mips/drivers/usb/gadget/net2280.c
    old new  
    468468#elif   defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
    469469#define USE_KMALLOC
    470470
    471 #elif   defined(CONFIG_MIPS) && !defined(CONFIG_DMA_NONCOHERENT)
     471#elif   defined(CONFIG_MIPS) && \
     472        (defined(CONFIG_DMA_COHERENT) || defined(CONFIG_DMA_IP27))
    472473#define USE_KMALLOC
    473474
    474475/* FIXME there are other cases, including an x86-64 one ...  */

  • drivers/usb/host/ohci-hcd.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/usb/host/ohci-hcd.c linux-2.6.17.4-mips/drivers/usb/host/ohci-hcd.c
    old new  
    906906#include "ohci-au1xxx.c"
    907907#endif
    908908
     909#ifdef CONFIG_PNX8550
     910#include "ohci-pnx8550.c"
     911#endif
     912
    909913#ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
    910914#include "ohci-ppc-soc.c"
    911915#endif

  • drivers/video/au1100fb.c 

    diff -Naur linux-2.6.17.4-kernel/drivers/video/au1100fb.c linux-2.6.17.4-mips/drivers/video/au1100fb.c
    old new  
    3838 *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3939 *  675 Mass Ave, Cambridge, MA 02139, USA.
    4040 */
     41
    4142#include <linux/config.h>
    4243#include <linux/module.h>
    4344#include <linux/kernel.h>

  • drivers/video/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/drivers/video/Kconfig linux-2.6.17.4-mips/drivers/video/Kconfig
    old new  
    11421142          Please read the <file:Documentation/fb/README-sstfb.txt> for supported
    11431143          options and other important info  support.
    11441144
     1145config FB_SMIVGX
     1146        tristate "Silicon Motion VoyagerGX support"
     1147        depends on FB && PCI && (MIPS || EXPERIMENTAL)
     1148        select FB_CFB_FILLRECT
     1149        select FB_CFB_COPYAREA
     1150        select FB_CFB_IMAGEBLIT
     1151        ---help---
     1152          This drivers supports SMI VoyagerGX 501 based PCI boards
     1153          The default settings drive both a CRT and LCD.  The CRT
     1154          can be turned off by passing in the no_crt option
     1155
    11451156config FB_CYBLA
    11461157        tristate "Cyberblade/i1 support"
    11471158        depends on FB && PCI && X86_32 && !64BIT
    … …  
    12061217
    12071218config FB_AU1100
    12081219        bool "Au1100 LCD Driver"
    1209         depends on (FB = y) && EXPERIMENTAL && PCI && MIPS && MIPS_PB1100=y
     1220        depends on FB && MIPS && SOC_AU1100
     1221        select FB_CFB_FILLRECT
     1222        select FB_CFB_COPYAREA
     1223        select FB_CFB_IMAGEBLIT
     1224        help
     1225          This is the framebuffer driver for the AMD Au1100 SOC.  It can drive
     1226          various panels and CRTs by passing in kernel cmd line option
     1227          au1100fb:panel=<name>.
     1228
     1229config FB_AU1200
     1230        bool "Au1200 LCD Driver"
     1231        depends on FB && MIPS && SOC_AU1200
     1232        select FB_CFB_FILLRECT
     1233        select FB_CFB_COPYAREA
     1234        select FB_CFB_IMAGEBLIT
     1235        help
     1236          This is the framebuffer driver for the AMD Au1200 SOC.  It can drive
     1237          various panels and CRTs by passing in kernel cmd line option
     1238          au1200fb:panel=<name>.
    12101239
    12111240config FB_AU1200
    12121241        bool "Au1200 LCD Driver"
    … …  
    13221351        select FB_CFB_IMAGEBLIT
    13231352        help
    13241353          Support for the PMAGB-B TURBOchannel framebuffer card used mainly
    1325           in the MIPS-based DECstation series. The card is currently only
    1326           supported in 1280x1024x8 mode.
     1354          in the MIPS-based DECstation series. The card is currently only 
     1355          supported in 1280x1024x8 mode. 
    13271356
    13281357config FB_MAXINE
    13291358        bool "Maxine (Personal DECstation) onboard framebuffer support"

  • drivers/video/Makefile 

    diff -Naur linux-2.6.17.4-kernel/drivers/video/Makefile linux-2.6.17.4-mips/drivers/video/Makefile
    old new  
    9393obj-$(CONFIG_FB_TX3912)           += tx3912fb.o
    9494obj-$(CONFIG_FB_S1D13XXX)         += s1d13xxxfb.o
    9595obj-$(CONFIG_FB_IMX)              += imxfb.o
     96obj-$(CONFIG_FB_SMIVGX)           += smivgxfb.o
    9697obj-$(CONFIG_FB_S3C2410)          += s3c2410fb.o
    9798
    9899# Platform or fallback drivers go here

  • include/asm-mips/asmmacro-32.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/asmmacro-32.h linux-2.6.17.4-mips/include/asm-mips/asmmacro-32.h
    old new  
    1212#include <asm/fpregdef.h>
    1313#include <asm/mipsregs.h>
    1414
    15         .macro  fpu_save_double thread status tmp1=t0 tmp2
     15        .macro  fpu_save_double thread status tmp1=t0
    1616        cfc1    \tmp1,  fcr31
    1717        sdc1    $f0,  THREAD_FPR0(\thread)
    1818        sdc1    $f2,  THREAD_FPR2(\thread)
    … …  
    7070        sw      \tmp, THREAD_FCR31(\thread)
    7171        .endm
    7272
    73         .macro  fpu_restore_double thread tmp=t0
     73        .macro  fpu_restore_double thread status tmp=t0
    7474        lw      \tmp, THREAD_FCR31(\thread)
    7575        ldc1    $f0,  THREAD_FPR0(\thread)
    7676        ldc1    $f2,  THREAD_FPR2(\thread)

  • include/asm-mips/asmmacro-64.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/asmmacro-64.h linux-2.6.17.4-mips/include/asm-mips/asmmacro-64.h
    old new  
    5353        sdc1    $f31, THREAD_FPR31(\thread)
    5454        .endm
    5555
    56         .macro  fpu_save_double thread status tmp1 tmp2
    57         sll     \tmp2, \tmp1, 5
    58         bgez    \tmp2, 2f
     56        .macro  fpu_save_double thread status tmp
     57        sll     \tmp, \status, 5
     58        bgez    \tmp, 2f
    5959        fpu_save_16odd \thread
    60602:
    61         fpu_save_16even \thread \tmp1                   # clobbers t1
     61        fpu_save_16even \thread \tmp
    6262        .endm
    6363
    6464        .macro  fpu_restore_16even thread tmp=t0
    … …  
    101101        ldc1    $f31, THREAD_FPR31(\thread)
    102102        .endm
    103103
    104         .macro  fpu_restore_double thread tmp
    105         mfc0    t0, CP0_STATUS
    106         sll     t1, t0, 5
    107         bgez    t1, 1f                          # 16 register mode?
     104        .macro  fpu_restore_double thread status tmp
     105        sll     \tmp, \status, 5
     106        bgez    \tmp, 1f                                # 16 register mode?
    108107
    109         fpu_restore_16odd a0
    110 1:      fpu_restore_16even a0, t0               # clobbers t0
     108        fpu_restore_16odd \thread
     1091:      fpu_restore_16even \thread \tmp
    111110        .endm
    112111
    113112        .macro  cpu_save_nonscratch thread

  • include/asm-mips/asmmacro.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/asmmacro.h linux-2.6.17.4-mips/include/asm-mips/asmmacro.h
    old new  
    2727        ori     \reg, \reg, TCSTATUS_IXMT
    2828        xori    \reg, \reg, TCSTATUS_IXMT
    2929        mtc0    \reg, CP0_TCSTATUS
    30         ehb
     30        _ehb
    3131        .endm
    3232
    3333        .macro  local_irq_disable reg=t0
    3434        mfc0    \reg, CP0_TCSTATUS
    3535        ori     \reg, \reg, TCSTATUS_IXMT
    3636        mtc0    \reg, CP0_TCSTATUS
    37         ehb
     37        _ehb
    3838        .endm
    3939#else
    4040        .macro  local_irq_enable reg=t0

  • include/asm-mips/cpu-features.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/cpu-features.h linux-2.6.17.4-mips/include/asm-mips/cpu-features.h
    old new  
    144144#define cpu_has_dsp             (cpu_data[0].ases & MIPS_ASE_DSP)
    145145#endif
    146146
    147 #ifdef CONFIG_MIPS_MT
    148147#ifndef cpu_has_mipsmt
    149 # define cpu_has_mipsmt         (cpu_data[0].ases & MIPS_ASE_MIPSMT)
    150 #endif
    151 #else
    152 # define cpu_has_mipsmt         0
     148#define cpu_has_mipsmt          (cpu_data[0].ases & MIPS_ASE_MIPSMT)
    153149#endif
    154150
    155151#ifdef CONFIG_32BIT
    … …  
    188184# endif
    189185#endif
    190186
    191 #ifdef CONFIG_CPU_MIPSR2
    192 # if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
    193 #  define cpu_has_vint          (cpu_data[0].options & MIPS_CPU_VINT)
    194 # else
    195 #  define cpu_has_vint                  0
    196 # endif
    197 # if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
    198 #  define cpu_has_veic          (cpu_data[0].options & MIPS_CPU_VEIC)
    199 # else
    200 #  define cpu_has_veic                  0
    201 # endif
    202 #else
     187#if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
     188# define cpu_has_vint           (cpu_data[0].options & MIPS_CPU_VINT)
     189#elif !defined(cpu_has_vint)
    203190# define cpu_has_vint                   0
     191#endif
     192
     193#if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
     194# define cpu_has_veic           (cpu_data[0].options & MIPS_CPU_VEIC)
     195#elif !defined(cpu_has_veic)
    204196# define cpu_has_veic                   0
    205197#endif
    206198

  • include/asm-mips/futex.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/futex.h linux-2.6.17.4-mips/include/asm-mips/futex.h
    old new  
    2222                "       .set    push                            \n"     \
    2323                "       .set    noat                            \n"     \
    2424                "       .set    mips3                           \n"     \
    25                 "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
     25                "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
    2626                "       .set    mips0                           \n"     \
    2727                "       " insn  "                               \n"     \
    2828                "       .set    mips3                           \n"     \
    29                 "2:     sc      $1, (%3)                        \n"     \
     29                "2:     sc      $1, %2                          \n"     \
    3030                "       beqzl   $1, 1b                          \n"     \
    3131                __FUTEX_SMP_SYNC                                        \
    3232                "3:                                             \n"     \
    3333                "       .set    pop                             \n"     \
    3434                "       .set    mips0                           \n"     \
    3535                "       .section .fixup,\"ax\"                  \n"     \
    36                 "4:     li      %0, %5                          \n"     \
     36                "4:     li      %0, %6                          \n"     \
    3737                "       j       2b                              \n"     \
    3838                "       .previous                               \n"     \
    3939                "       .section __ex_table,\"a\"               \n"     \
    4040                "       "__UA_ADDR "\t1b, 4b                    \n"     \
    4141                "       "__UA_ADDR "\t2b, 4b                    \n"     \
    4242                "       .previous                               \n"     \
    43                 : "=r" (ret), "=r" (oldval)                             \
    44                 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
     43                : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
     44                : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
     45                : "memory");                                            \
    4546        } else if (cpu_has_llsc) {                                      \
    4647                __asm__ __volatile__(                                   \
    4748                "       .set    push                            \n"     \
    4849                "       .set    noat                            \n"     \
    4950                "       .set    mips3                           \n"     \
    50                 "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
     51                "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
    5152                "       .set    mips0                           \n"     \
    5253                "       " insn  "                               \n"     \
    5354                "       .set    mips3                           \n"     \
    54                 "2:     sc      $1, (%3)                        \n"     \
     55                "2:     sc      $1, %2                          \n"     \
    5556                "       beqz    $1, 1b                          \n"     \
    5657                __FUTEX_SMP_SYNC                                        \
    5758                "3:                                             \n"     \
    5859                "       .set    pop                             \n"     \
    5960                "       .set    mips0                           \n"     \
    6061                "       .section .fixup,\"ax\"                  \n"     \
    61                 "4:     li      %0, %5                          \n"     \
     62                "4:     li      %0, %6                          \n"     \
    6263                "       j       2b                              \n"     \
    6364                "       .previous                               \n"     \
    6465                "       .section __ex_table,\"a\"               \n"     \
    6566                "       "__UA_ADDR "\t1b, 4b                    \n"     \
    6667                "       "__UA_ADDR "\t2b, 4b                    \n"     \
    6768                "       .previous                               \n"     \
    68                 : "=r" (ret), "=r" (oldval)                             \
    69                 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
     69                : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
     70                : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
     71                : "memory");                                            \
    7072        } else                                                          \
    7173                ret = -ENOSYS;                                          \
    7274}
    … …  
    8991
    9092        switch (op) {
    9193        case FUTEX_OP_SET:
    92                 __futex_atomic_op("move $1, %z4", ret, oldval, uaddr, oparg);
     94                __futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg);
    9395                break;
    9496
    9597        case FUTEX_OP_ADD:
    96                 __futex_atomic_op("addu $1, %1, %z4",
     98                __futex_atomic_op("addu $1, %1, %z5",
    9799                                  ret, oldval, uaddr, oparg);
    98100                break;
    99101        case FUTEX_OP_OR:
    100                 __futex_atomic_op("or   $1, %1, %z4",
     102                __futex_atomic_op("or   $1, %1, %z5",
    101103                                  ret, oldval, uaddr, oparg);
    102104                break;
    103105        case FUTEX_OP_ANDN:
    104                 __futex_atomic_op("and  $1, %1, %z4",
     106                __futex_atomic_op("and  $1, %1, %z5",
    105107                                  ret, oldval, uaddr, ~oparg);
    106108                break;
    107109        case FUTEX_OP_XOR:
    108                 __futex_atomic_op("xor  $1, %1, %z4",
     110                __futex_atomic_op("xor  $1, %1, %z5",
    109111                                  ret, oldval, uaddr, oparg);
    110112                break;
    111113        default:

  • include/asm-mips/hazards.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/hazards.h linux-2.6.17.4-mips/include/asm-mips/hazards.h
    old new  
    7070 * Use a macro for ehb unless explicit support for MIPSR2 is enabled
    7171 */
    7272
    73 #define irq_enable_hazard
     73#define irq_enable_hazard                                               \
    7474        _ehb
    7575
    76 #define irq_disable_hazard
     76#define irq_disable_hazard                                              \
    7777        _ehb
    7878
    7979#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)

  • include/asm-mips/io.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/io.h linux-2.6.17.4-mips/include/asm-mips/io.h
    old new  
    519519}
    520520
    521521/*
    522  * Memory Mapped I/O
    523  */
    524 #define ioread8(addr)           readb(addr)
    525 #define ioread16(addr)          readw(addr)
    526 #define ioread32(addr)          readl(addr)
    527 
    528 #define iowrite8(b,addr)        writeb(b,addr)
    529 #define iowrite16(w,addr)       writew(w,addr)
    530 #define iowrite32(l,addr)       writel(l,addr)
    531 
    532 #define ioread8_rep(a,b,c)      readsb(a,b,c)
    533 #define ioread16_rep(a,b,c)     readsw(a,b,c)
    534 #define ioread32_rep(a,b,c)     readsl(a,b,c)
    535 
    536 #define iowrite8_rep(a,b,c)     writesb(a,b,c)
    537 #define iowrite16_rep(a,b,c)    writesw(a,b,c)
    538 #define iowrite32_rep(a,b,c)    writesl(a,b,c)
    539 
    540 /* Create a virtual mapping cookie for an IO port range */
    541 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
    542 extern void ioport_unmap(void __iomem *);
    543 
    544 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
    545 struct pci_dev;
    546 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
    547 extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
    548 
    549 /*
    550522 * ISA space is 'always mapped' on currently supported MIPS systems, no need
    551523 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
    552524 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values

  • include/asm-mips/irq.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/irq.h linux-2.6.17.4-mips/include/asm-mips/irq.h
    old new  
    7777                          unsigned long hwmask);
    7878#endif /* CONFIG_MIPS_MT_SMTC */
    7979
     80#ifdef CONFIG_SMP
     81#define ARCH_HAS_IRQ_PER_CPU
     82#endif
     83
    8084#endif /* _ASM_IRQ_H */

  • include/asm-mips/mach-au1x00/au1xxx_ide.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/mach-au1x00/au1xxx_ide.h linux-2.6.17.4-mips/include/asm-mips/mach-au1x00/au1xxx_ide.h
    old new  
    8484} _auide_hwif;
    8585
    8686#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
     87
    8788/* HD white list */
    8889static const struct drive_list_entry dma_white_list [] = {
    8990/*

  • include/asm-mips/mach-mips/irq.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/mach-mips/irq.h linux-2.6.17.4-mips/include/asm-mips/mach-mips/irq.h
    old new  
    55
    66#define NR_IRQS 256
    77
    8 #ifdef CONFIG_SMP
    9 
    10 #define ARCH_HAS_IRQ_PER_CPU
    11 
    12 #endif
    13 
    148#endif /* __ASM_MACH_MIPS_IRQ_H */

  • include/asm-mips/mipsregs.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/mipsregs.h linux-2.6.17.4-mips/include/asm-mips/mipsregs.h
    old new  
    14621462static inline void __ehb(void)
    14631463{
    14641464        __asm__ __volatile__(
    1465         "       ehb                                                     \n");
     1465        "       .set    mips32r2                                        \n"
     1466        "       ehb                                                     \n"             "       .set    mips0                                           \n");
    14661467}
    14671468
    14681469/*

  • include/asm-mips/smp.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/smp.h linux-2.6.17.4-mips/include/asm-mips/smp.h
    old new  
    114114
    115115#endif /* CONFIG_SMP */
    116116
     117int smp_call_function(void(*func)(void *info), void *info, int retry, int wait);
     118
     119/*
     120 * Special Variant of smp_call_function for use by cache functions:
     121 *
     122 *  o No return value
     123 *  o collapses to normal function call on UP kernels
     124 *  o collapses to normal function call on systems with a single shared
     125 *    primary cache.
     126 *  o Both CONFIG_MIPS_MT_SMP and CONFIG_MIPS_MT_SMTC currently imply there
     127 *    is only one physical core.
     128 */
     129static inline void __on_other_cores(void (*func) (void *info), void *info)
     130{
     131#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
     132        smp_call_function(func, info, 1, 1);
     133#endif
     134}
     135
     136static inline void __on_each_core(void (*func) (void *info), void *info)
     137{
     138        preempt_disable();
     139
     140        __on_other_cores(func, info);
     141        func(info);
     142
     143        preempt_enable();
     144}
     145
    117146#endif /* __ASM_SMP_H */

  • include/asm-mips/stackframe.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/stackframe.h linux-2.6.17.4-mips/include/asm-mips/stackframe.h
    old new  
    305305                mfc0    v0, CP0_TCSTATUS
    306306                ori     v0, TCSTATUS_IXMT
    307307                mtc0    v0, CP0_TCSTATUS
    308                 ehb
     308                _ehb
    309309                DMT     5                               # dmt a1
    310310                jal     mips_ihb
    311311#endif /* CONFIG_MIPS_MT_SMTC */
    … …  
    326326 * restore TCStatus.IXMT.
    327327 */
    328328                LONG_L  v1, PT_TCSTATUS(sp)
    329                 ehb
     329                _ehb
    330330                mfc0    v0, CP0_TCSTATUS
    331331                andi    v1, TCSTATUS_IXMT
    332332                /* We know that TCStatua.IXMT should be set from above */
    333333                xori    v0, v0, TCSTATUS_IXMT
    334334                or      v0, v0, v1
    335335                mtc0    v0, CP0_TCSTATUS
    336                 ehb
     336                _ehb
    337337                andi    a1, a1, VPECONTROL_TE
    338338                beqz    a1, 1f
    339339                emt
    … …  
    412412                /* Clear TKSU, leave IXMT */
    413413                xori    t0, 0x00001800
    414414                mtc0    t0, CP0_TCSTATUS
    415                 ehb
     415                _ehb
    416416                /* We need to leave the global IE bit set, but clear EXL...*/
    417417                mfc0    t0, CP0_STATUS
    418418                ori     t0, ST0_EXL | ST0_ERL
    … …  
    439439                 * and enable interrupts only for the
    440440                 * current TC, using the TCStatus register.
    441441                 */
    442                 ehb
     442                _ehb
    443443                mfc0    t0,CP0_TCSTATUS
    444444                /* Fortunately CU 0 is in the same place in both registers */
    445445                /* Set TCU0, TKSU (for later inversion) and IXMT */
    … …  
    448448                /* Clear TKSU *and* IXMT */
    449449                xori    t0, 0x00001c00
    450450                mtc0    t0, CP0_TCSTATUS
    451                 ehb
     451                _ehb
    452452                /* We need to leave the global IE bit set, but clear EXL...*/
    453453                mfc0    t0, CP0_STATUS
    454454                ori     t0, ST0_EXL
    … …  
    480480                andi    v1, v0, TCSTATUS_IXMT
    481481                ori     v0, TCSTATUS_IXMT
    482482                mtc0    v0, CP0_TCSTATUS
    483                 ehb
     483                _ehb
    484484                DMT     2                               # dmt   v0
    485485                /*
    486486                 * We don't know a priori if ra is "live"
    … …  
    496496                xori    t0, 0x1e
    497497                mtc0    t0, CP0_STATUS
    498498#ifdef CONFIG_MIPS_MT_SMTC
    499                 ehb
     499                _ehb
    500500                andi    v0, v0, VPECONTROL_TE
    501501                beqz    v0, 2f
    502502                nop     /* delay slot */

  • include/asm-mips/unistd.h 

    diff -Naur linux-2.6.17.4-kernel/include/asm-mips/unistd.h linux-2.6.17.4-mips/include/asm-mips/unistd.h
    old new  
    326326#define __NR_unshare                    (__NR_Linux + 303)
    327327#define __NR_splice                     (__NR_Linux + 304)
    328328#define __NR_sync_file_range            (__NR_Linux + 305)
     329#define __NR_tee                        (__NR_Linux + 306)
    329330
    330331/*
    331332 * Offset of the last Linux o32 flavoured syscall
    332333 */
    333 #define __NR_Linux_syscalls             305
     334#define __NR_Linux_syscalls             306
    334335
    335336#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
    336337
    337338#define __NR_O32_Linux                  4000
    338 #define __NR_O32_Linux_syscalls         305
     339#define __NR_O32_Linux_syscalls         306
    339340
    340341#if _MIPS_SIM == _MIPS_SIM_ABI64
    341342
    … …  
    608609#define __NR_unshare                    (__NR_Linux + 262)
    609610#define __NR_splice                     (__NR_Linux + 263)
    610611#define __NR_sync_file_range            (__NR_Linux + 264)
     612#define __NR_tee                        (__NR_Linux + 265)
    611613
    612614/*
    613615 * Offset of the last Linux 64-bit flavoured syscall
    614616 */
    615 #define __NR_Linux_syscalls             264
     617#define __NR_Linux_syscalls             265
    616618
    617619#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
    618620
    619621#define __NR_64_Linux                   5000
    620 #define __NR_64_Linux_syscalls          264
     622#define __NR_64_Linux_syscalls          265
    621623
    622624#if _MIPS_SIM == _MIPS_SIM_NABI32
    623625
    … …  
    894896#define __NR_unshare                    (__NR_Linux + 266)
    895897#define __NR_splice                     (__NR_Linux + 267)
    896898#define __NR_sync_file_range            (__NR_Linux + 268)
     899#define __NR_tee                        (__NR_Linux + 269)
    897900
    898901/*
    899902 * Offset of the last N32 flavoured syscall
    900903 */
    901 #define __NR_Linux_syscalls             268
     904#define __NR_Linux_syscalls             269
    902905
    903906#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
    904907
    905908#define __NR_N32_Linux                  6000
    906 #define __NR_N32_Linux_syscalls         268
     909#define __NR_N32_Linux_syscalls         269
    907910
    908911#ifndef __ASSEMBLY__
    909912

  • include/linux/elf.h 

    diff -Naur linux-2.6.17.4-kernel/include/linux/elf.h linux-2.6.17.4-mips/include/linux/elf.h
    old new  
    6767
    6868#define EM_MIPS         8       /* MIPS R3000 (officially, big-endian only) */
    6969
    70 #define EM_MIPS_RS4_BE 10       /* MIPS R4000 big-endian */
     70#define EM_MIPS_RS3_LE 10       /* MIPS R3000 little-endian */
    7171
    7272#define EM_PARISC      15       /* HPPA */
    7373

  • include/linux/mc146818rtc.h 

    diff -Naur linux-2.6.17.4-kernel/include/linux/mc146818rtc.h linux-2.6.17.4-mips/include/linux/mc146818rtc.h
    old new  
    8989# define RTC_VRT 0x80           /* valid RAM and time */
    9090/**********************************************************************/
    9191
     92#ifndef RTC_IO_EXTENT
     93#define RTC_IO_EXTENT   0x8
     94#endif
     95
     96#ifndef RTC_IOMAPPED
     97#define RTC_IOMAPPED    1       /* Default to I/O mapping. */
     98#endif
     99
    92100#endif /* _MC146818RTC_H */

  • include/linux/pci_ids.h 

    diff -Naur linux-2.6.17.4-kernel/include/linux/pci_ids.h linux-2.6.17.4-mips/include/linux/pci_ids.h
    old new  
    15691569#define PCI_VENDOR_ID_SATSAGEM          0x1267
    15701570#define PCI_DEVICE_ID_SATSAGEM_NICCY    0x1016
    15711571
     1572#define PCI_VENDOR_ID_SILICON_MOTION            0x126f
     1573#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_AA   0x0501
     1574#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_B    0x0510
    15721575
    15731576#define PCI_VENDOR_ID_ENSONIQ           0x1274
    15741577#define PCI_DEVICE_ID_ENSONIQ_CT5880    0x5880

  • include/linux/serial.h 

    diff -Naur linux-2.6.17.4-kernel/include/linux/serial.h linux-2.6.17.4-mips/include/linux/serial.h
    old new  
    7676#define PORT_16654      11
    7777#define PORT_16850      12
    7878#define PORT_RSA        13      /* RSA-DV II/S card */
    79 #define PORT_MAX        13
     79#define PORT_SB1250     14
     80#define PORT_MAX        14
    8081
    8182#define SERIAL_IO_PORT  0
    8283#define SERIAL_IO_HUB6  1

  • include/linux/serial_ip3106.h 

    diff -Naur linux-2.6.17.4-kernel/include/linux/serial_ip3106.h linux-2.6.17.4-mips/include/linux/serial_ip3106.h
    old new  
    7878#define IP3106_UART_FIFO_RXFIFO         0x00001F00
    7979#define IP3106_UART_FIFO_RBRTHR         0x000000FF
    8080
     81#define ip3106_lcr(base,port)    *(volatile u32 *)(base+(port*0x1000) + 0x000)
     82#define ip3106_mcr(base, port)   *(volatile u32 *)(base+(port*0x1000) + 0x004)
     83#define ip3106_baud(base, port)  *(volatile u32 *)(base+(port*0x1000) + 0x008)
     84#define ip3106_cfg(base, port)   *(volatile u32 *)(base+(port*0x1000) + 0x00C)
     85#define ip3106_fifo(base, port)  *(volatile u32 *)(base+(port*0x1000) + 0x028)
     86#define ip3106_istat(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFE0)
     87#define ip3106_ien(base, port)   *(volatile u32 *)(base+(port*0x1000) + 0xFE4)
     88#define ip3106_iclr(base, port)  *(volatile u32 *)(base+(port*0x1000) + 0xFE8)
     89#define ip3106_iset(base, port)  *(volatile u32 *)(base+(port*0x1000) + 0xFEC)
     90#define ip3106_pd(base, port)    *(volatile u32 *)(base+(port*0x1000) + 0xFF4)
     91#define ip3106_mid(base, port)   *(volatile u32 *)(base+(port*0x1000) + 0xFFC)
     92
    8193#endif

  • sound/oss/au1550_ac97.c 

    diff -Naur linux-2.6.17.4-kernel/sound/oss/au1550_ac97.c linux-2.6.17.4-mips/sound/oss/au1550_ac97.c
    old new  
    6060#include <asm/mach-au1x00/au1000.h>
    6161#include <asm/mach-au1x00/au1xxx_psc.h>
    6262#include <asm/mach-au1x00/au1xxx_dbdma.h>
     63#include <asm/mach-pb1x00/pb1550.h>
    6364
    6465#undef OSS_DOCUMENTED_MIXER_SEMANTICS
    6566

  • sound/oss/Kconfig 

    diff -Naur linux-2.6.17.4-kernel/sound/oss/Kconfig linux-2.6.17.4-mips/sound/oss/Kconfig
    old new  
    117117        tristate "Au1550 AC97 Sound"
    118118        depends on SOUND_PRIME && SOC_AU1550
    119119
     120config SOUND_AU1550_I2S
     121        tristate "Au1550 I2S Sound"
     122        depends on SOUND_PRIME && SOC_AU1550
     123
    120124config SOUND_TRIDENT
    121125        tristate "Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core"
    122126        depends on SOUND_PRIME && PCI

  • sound/oss/Makefile 

    diff -Naur linux-2.6.17.4-kernel/sound/oss/Makefile linux-2.6.17.4-mips/sound/oss/Makefile
    old new  
    6666obj-$(CONFIG_SOUND_VRC5477)     += nec_vrc5477.o ac97_codec.o
    6767obj-$(CONFIG_SOUND_AU1000)      += au1000.o ac97_codec.o
    6868obj-$(CONFIG_SOUND_AU1550_AC97) += au1550_ac97.o ac97_codec.o
     69obj-$(CONFIG_SOUND_AU1550_I2S)  += au1550_i2s.o
    6970obj-$(CONFIG_SOUND_ESSSOLO1)    += esssolo1.o
    7071obj-$(CONFIG_SOUND_FUSION)      += cs46xx.o ac97_codec.o
    7172obj-$(CONFIG_SOUND_MAESTRO)     += maestro.o
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