source:
patches/gcc-4.6.3-mips_fix-1.patch@
736bb57
Last change on this file since 736bb57 was 736bb57, checked in by , 12 years ago | |
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File size: 5.1 KB |
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gcc/expmed.c
Submitted By: Jonathan Norman (jonathan at bluesquarelinux.co.uk) Date: 2011-07-12 Initial Package Version: 4.6.0 Origin: Upstream Upstream Status: Applied Description: Fixes a issue with Mips that causes GCC to setfault when using optimation greater than -O0. Taken from GCC Revision 174541 and applied to GCC 4.6.0 diff -Naur gcc-4.6.0.orig/gcc/expmed.c gcc-4.6.0/gcc/expmed.c
old new 1431 1431 unsigned int nwords = (bitsize + (BITS_PER_WORD - 1)) / BITS_PER_WORD; 1432 1432 unsigned int i; 1433 1433 1434 if (target == 0 || !REG_P (target) )1434 if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target)) 1435 1435 target = gen_reg_rtx (mode); 1436 1436 1437 1437 /* Indicate for flow that the entire target reg is being set. */ -
gcc/optabs.c
diff -Naur gcc-4.6.0.orig/gcc/optabs.c gcc-4.6.0/gcc/optabs.c
old new 1694 1694 1695 1695 /* If TARGET is the same as one of the operands, the REG_EQUAL note 1696 1696 won't be accurate, so use a new target. */ 1697 if (target == 0 || target == op0 || target == op1) 1697 if (target == 0 1698 || target == op0 1699 || target == op1 1700 || !valid_multiword_target_p (target)) 1698 1701 target = gen_reg_rtx (mode); 1699 1702 1700 1703 start_sequence (); … … 1762 1765 1763 1766 /* If TARGET is the same as one of the operands, the REG_EQUAL note 1764 1767 won't be accurate, so use a new target. */ 1765 if (target == 0 || target == op0 || target == op1) 1768 if (target == 0 1769 || target == op0 1770 || target == op1 1771 || !valid_multiword_target_p (target)) 1766 1772 target = gen_reg_rtx (mode); 1767 1773 1768 1774 start_sequence (); … … 1816 1822 opportunities, and second because if target and op0 happen to be MEMs 1817 1823 designating the same location, we would risk clobbering it too early 1818 1824 in the code sequence we generate below. */ 1819 if (target == 0 || target == op0 || target == op1 || ! REG_P (target)) 1825 if (target == 0 1826 || target == op0 1827 || target == op1 1828 || !REG_P (target) 1829 || !valid_multiword_target_p (target)) 1820 1830 target = gen_reg_rtx (mode); 1821 1831 1822 1832 start_sequence (); … … 1936 1946 1937 1947 xtarget = gen_reg_rtx (mode); 1938 1948 1939 if (target == 0 || !REG_P (target) )1949 if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target)) 1940 1950 target = xtarget; 1941 1951 1942 1952 /* Indicate for flow that the entire target reg is being set. */ … … 2689 2699 t0 = expand_unop (word_mode, bswap_optab, 2690 2700 operand_subword_force (op, 1, mode), NULL_RTX, true); 2691 2701 2692 if (target == 0 )2702 if (target == 0 || !valid_multiword_target_p (target)) 2693 2703 target = gen_reg_rtx (mode); 2694 2704 if (REG_P (target)) 2695 2705 emit_clobber (target); … … 2932 2942 if (code == ABS) 2933 2943 mask = double_int_not (mask); 2934 2944 2935 if (target == 0 || target == op0) 2945 if (target == 0 2946 || target == op0 2947 || (nwords > 1 && !valid_multiword_target_p (target))) 2936 2948 target = gen_reg_rtx (mode); 2937 2949 2938 2950 if (nwords > 1) … … 3140 3152 int i; 3141 3153 rtx insns; 3142 3154 3143 if (target == 0 || target == op0 )3155 if (target == 0 || target == op0 || !valid_multiword_target_p (target)) 3144 3156 target = gen_reg_rtx (mode); 3145 3157 3146 3158 start_sequence (); … … 3611 3623 3612 3624 mask = double_int_setbit (double_int_zero, bitpos); 3613 3625 3614 if (target == 0 || target == op0 || target == op1) 3626 if (target == 0 3627 || target == op0 3628 || target == op1 3629 || (nwords > 1 && !valid_multiword_target_p (target))) 3615 3630 target = gen_reg_rtx (mode); 3616 3631 3617 3632 if (nwords > 1) … … 7330 7345 return NULL_RTX; 7331 7346 } 7332 7347 7348 /* TARGET is a target of a multiword operation that we are going to 7349 implement as a series of word-mode operations. Return true if 7350 TARGET is suitable for this purpose. */ 7351 7352 bool 7353 valid_multiword_target_p (rtx target) 7354 { 7355 enum machine_mode mode; 7356 int i; 7357 7358 mode = GET_MODE (target); 7359 for (i = 0; i < GET_MODE_SIZE (mode); i += UNITS_PER_WORD) 7360 if (!validate_subreg (word_mode, mode, target, i)) 7361 return false; 7362 return true; 7363 } 7364 7333 7365 #include "gt-optabs.h" -
gcc/optabs.h
diff -Naur gcc-4.6.0.orig/gcc/optabs.h gcc-4.6.0/gcc/optabs.h
old new 923 923 extern rtx optab_libfunc (optab optab, enum machine_mode mode); 924 924 extern rtx convert_optab_libfunc (convert_optab optab, enum machine_mode mode1, 925 925 enum machine_mode mode2); 926 927 extern bool valid_multiword_target_p (rtx); 926 928 #endif /* GCC_OPTABS_H */ -
gcc/testsuite/gcc.target/mips/pr45074.c
diff -Naur gcc-4.6.0.orig/gcc/testsuite/gcc.target/mips/pr45074.c gcc-4.6.0/gcc/testsuite/gcc.target/mips/pr45074.c
old new 1 /* { dg-options "-mhard-float -mgp32 -O" } */ 2 register double g __asm__("$f20"); 3 4 NOMIPS16 void 5 test (double a) 6 { 7 g = -a; 8 }
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