source:
patches/gcc-4.6.3-branch_update-1.patch@
06b2d12
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boehm-gc/configure
Submitted By: Jim Gifford (jim at cross-lfs dot org) Date: 08-25-2012 Initial Package Version: 4.6.3 Origin: Upstream Upstream Status: Applied Description: This is a branch update for gcc-4.6.3, and should be rechecked periodically. This patch was made from Revision # 190659. diff -Naur gcc-4.6.3.orig/boehm-gc/configure gcc-4.6.3/boehm-gc/configure
old new 15246 15246 fi 15247 15247 done 15248 15248 15249 for ac_func in pthread_get_stackaddr_np 15250 do : 15251 ac_fn_c_check_func "$LINENO" "pthread_get_stackaddr_np" "ac_cv_func_pthread_get_stackaddr_np" 15252 if test "x$ac_cv_func_pthread_get_stackaddr_np" = x""yes; then : 15253 cat >>confdefs.h <<_ACEOF 15254 #define HAVE_PTHREAD_GET_STACKADDR_NP 1 15255 _ACEOF 15256 15257 fi 15258 done 15259 15249 15260 LIBS="$oldLIBS" 15250 15261 15251 15262 # Configuration of machine-dependent code -
boehm-gc/configure.ac
diff -Naur gcc-4.6.3.orig/boehm-gc/configure.ac gcc-4.6.3/boehm-gc/configure.ac
old new 392 392 oldLIBS="$LIBS" 393 393 LIBS="$LIBS $THREADLIBS" 394 394 AC_CHECK_FUNCS([pthread_getattr_np]) 395 AC_CHECK_FUNCS([pthread_get_stackaddr_np]) 395 396 LIBS="$oldLIBS" 396 397 397 398 # Configuration of machine-dependent code -
boehm-gc/include/gc_config.h.in
diff -Naur gcc-4.6.3.orig/boehm-gc/include/gc_config.h.in gcc-4.6.3/boehm-gc/include/gc_config.h.in
old new 87 87 /* Define to 1 if you have the `pthread_getattr_np' function. */ 88 88 #undef HAVE_PTHREAD_GETATTR_NP 89 89 90 /* Define to 1 if you have the `pthread_get_stackaddr_np_np' function. */ 91 #undef HAVE_PTHREAD_GET_STACKADDR_NP 92 90 93 /* Define to 1 if you have the <stdint.h> header file. */ 91 94 #undef HAVE_STDINT_H 92 95 -
boehm-gc/include/private/gcconfig.h
diff -Naur gcc-4.6.3.orig/boehm-gc/include/private/gcconfig.h gcc-4.6.3/boehm-gc/include/private/gcconfig.h
old new 1331 1331 These aren't used when dyld support is enabled (it is by default) */ 1332 1332 # define DATASTART ((ptr_t) get_etext()) 1333 1333 # define DATAEND ((ptr_t) get_end()) 1334 # define STACKBOTTOM ((ptr_t) 0xc0000000) 1334 # ifdef HAVE_PTHREAD_GET_STACKADDR_NP 1335 # define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) 1336 # else 1337 # define STACKBOTTOM ((ptr_t) 0xc0000000) 1338 # endif 1335 1339 # define USE_MMAP 1336 1340 # define USE_MMAP_ANON 1337 1341 # define USE_ASM_PUSH_REGS … … 2011 2015 These aren't used when dyld support is enabled (it is by default) */ 2012 2016 # define DATASTART ((ptr_t) get_etext()) 2013 2017 # define DATAEND ((ptr_t) get_end()) 2014 # define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) 2018 # ifdef HAVE_PTHREAD_GET_STACKADDR_NP 2019 # define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) 2020 # else 2021 # define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) 2022 # endif 2015 2023 # define USE_MMAP 2016 2024 # define USE_MMAP_ANON 2017 2025 # ifdef GC_DARWIN_THREADS -
gcc/DATESTAMP
diff -Naur gcc-4.6.3.orig/gcc/DATESTAMP gcc-4.6.3/gcc/DATESTAMP
old new 1 20120 3011 20120825 -
gcc/ada/gcc-interface/decl.c
diff -Naur gcc-4.6.3.orig/gcc/ada/gcc-interface/decl.c gcc-4.6.3/gcc/ada/gcc-interface/decl.c
old new 120 120 /* The value of the qualifier. */ 121 121 tree qual; 122 122 123 /* The record associated with this variant. */124 tree record;123 /* The type of the variant after transformation. */ 124 tree new_type; 125 125 } variant_desc; 126 126 127 127 DEF_VEC_O(variant_desc); … … 3157 3157 { 3158 3158 tree old_variant = v->type; 3159 3159 tree new_variant = make_node (RECORD_TYPE); 3160 tree suffix 3161 = concat_name (DECL_NAME (gnu_variant_part), 3162 IDENTIFIER_POINTER 3163 (DECL_NAME (v->field))); 3160 3164 TYPE_NAME (new_variant) 3161 = DECL_NAME (TYPE_NAME (old_variant)); 3165 = concat_name (TYPE_NAME (gnu_type), 3166 IDENTIFIER_POINTER (suffix)); 3162 3167 copy_and_substitute_in_size (new_variant, old_variant, 3163 3168 gnu_subst_list); 3164 v-> record= new_variant;3169 v->new_type = new_variant; 3165 3170 } 3166 3171 } 3167 3172 else … … 3265 3270 if (selected_variant) 3266 3271 gnu_cont_type = gnu_type; 3267 3272 else 3268 gnu_cont_type = v-> record;3273 gnu_cont_type = v->new_type; 3269 3274 } 3270 3275 else 3271 3276 /* The front-end may pass us "ghost" components if … … 7704 7709 v->type = variant_type; 7705 7710 v->field = gnu_field; 7706 7711 v->qual = qual; 7707 v-> record= NULL_TREE;7712 v->new_type = NULL_TREE; 7708 7713 7709 7714 /* Recurse on the variant subpart of the variant, if any. */ 7710 7715 variant_subpart = get_variant_part (variant_type); … … 8457 8462 8458 8463 /* First create the type of the variant part from that of the old one. */ 8459 8464 new_union_type = make_node (QUAL_UNION_TYPE); 8460 TYPE_NAME (new_union_type) = DECL_NAME (TYPE_NAME (old_union_type)); 8465 TYPE_NAME (new_union_type) 8466 = concat_name (TYPE_NAME (record_type), 8467 IDENTIFIER_POINTER (DECL_NAME (old_variant_part))); 8461 8468 8462 8469 /* If the position of the variant part is constant, subtract it from the 8463 8470 size of the type of the parent to get the new size. This manual CSE … … 8491 8498 continue; 8492 8499 8493 8500 /* Retrieve the list of fields already added to the new variant. */ 8494 new_variant = v-> record;8501 new_variant = v->new_type; 8495 8502 field_list = TYPE_FIELDS (new_variant); 8496 8503 8497 8504 /* If the old variant had a variant subpart, we need to create a new -
gcc/c-typeck.c
diff -Naur gcc-4.6.3.orig/gcc/c-typeck.c gcc-4.6.3/gcc/c-typeck.c
old new 4315 4315 ret = fold_build3_loc (colon_loc, COND_EXPR, result_type, ifexp, op1, op2); 4316 4316 else 4317 4317 { 4318 if (int_operands) 4319 { 4320 op1 = remove_c_maybe_const_expr (op1); 4321 op2 = remove_c_maybe_const_expr (op2); 4322 } 4318 4323 ret = build3 (COND_EXPR, result_type, ifexp, op1, op2); 4319 4324 if (int_operands) 4320 4325 ret = note_integer_operands (ret); -
gcc/cgraph.c
diff -Naur gcc-4.6.3.orig/gcc/cgraph.c gcc-4.6.3/gcc/cgraph.c
old new 1700 1700 free_nodes = node; 1701 1701 } 1702 1702 1703 /* Remove the node from cgraph. */ 1703 /* Remove the node from cgraph and all inline clones inlined into it. 1704 Skip however removal of FORBIDDEN_NODE and return true if it needs to be 1705 removed. This allows to call the function from outer loop walking clone 1706 tree. */ 1704 1707 1705 void 1706 cgraph_remove_node_and_inline_clones (struct cgraph_node *node )1708 bool 1709 cgraph_remove_node_and_inline_clones (struct cgraph_node *node, struct cgraph_node *forbidden_node) 1707 1710 { 1708 1711 struct cgraph_edge *e, *next; 1712 bool found = false; 1713 1714 if (node == forbidden_node) 1715 return true; 1709 1716 for (e = node->callees; e; e = next) 1710 1717 { 1711 1718 next = e->next_callee; 1712 1719 if (!e->inline_failed) 1713 cgraph_remove_node_and_inline_clones (e->callee);1720 found |= cgraph_remove_node_and_inline_clones (e->callee, forbidden_node); 1714 1721 } 1715 1722 cgraph_remove_node (node); 1723 return found; 1716 1724 } 1717 1725 1718 1726 /* Notify finalize_compilation_unit that given node is reachable. */ -
gcc/cgraph.h
diff -Naur gcc-4.6.3.orig/gcc/cgraph.h gcc-4.6.3/gcc/cgraph.h
old new 547 547 void cgraph_insert_node_to_hashtable (struct cgraph_node *node); 548 548 void cgraph_remove_edge (struct cgraph_edge *); 549 549 void cgraph_remove_node (struct cgraph_node *); 550 void cgraph_remove_node_and_inline_clones (struct cgraph_node *);550 bool cgraph_remove_node_and_inline_clones (struct cgraph_node *, struct cgraph_node *); 551 551 void cgraph_release_function_body (struct cgraph_node *); 552 552 void cgraph_node_remove_callees (struct cgraph_node *node); 553 553 struct cgraph_edge *cgraph_create_edge (struct cgraph_node *, -
gcc/cgraphunit.c
diff -Naur gcc-4.6.3.orig/gcc/cgraphunit.c gcc-4.6.3/gcc/cgraphunit.c
old new 2157 2157 first_clone->ipa_transforms_to_apply); 2158 2158 first_clone->ipa_transforms_to_apply = NULL; 2159 2159 2160 /* When doing recursive inlining, the clone may become unnecessary. 2161 This is possible i.e. in the case when the recursive function is proved to be 2162 non-throwing and the recursion happens only in the EH landing pad. 2163 We can not remove the clone until we are done with saving the body. 2164 Remove it now. */ 2165 if (!first_clone->callers) 2166 { 2167 cgraph_remove_node_and_inline_clones (first_clone, NULL); 2168 first_clone = NULL; 2169 } 2160 2170 #ifdef ENABLE_CHECKING 2161 verify_cgraph_node (first_clone); 2171 else 2172 verify_cgraph_node (first_clone); 2162 2173 #endif 2163 2174 return first_clone; 2164 2175 } -
gcc/combine.c
diff -Naur gcc-4.6.3.orig/gcc/combine.c gcc-4.6.3/gcc/combine.c
old new 1788 1788 if (set == 0) 1789 1789 return 0; 1790 1790 1791 /* The simplification in expand_field_assignment may call back to 1792 get_last_value, so set safe guard here. */ 1793 subst_low_luid = DF_INSN_LUID (insn); 1794 1791 1795 set = expand_field_assignment (set); 1792 1796 src = SET_SRC (set), dest = SET_DEST (set); 1793 1797 -
gcc/config/alpha/alpha.c
diff -Naur gcc-4.6.3.orig/gcc/config/alpha/alpha.c gcc-4.6.3/gcc/config/alpha/alpha.c
old new 2469 2469 { 2470 2470 case EQ: case LE: case LT: case LEU: case LTU: 2471 2471 case UNORDERED: 2472 /* We have these compares :*/2472 /* We have these compares. */ 2473 2473 cmp_code = code, branch_code = NE; 2474 2474 break; 2475 2475 … … 2706 2706 switch (code) 2707 2707 { 2708 2708 case EQ: case LE: case LT: case LEU: case LTU: 2709 case UNORDERED: 2709 2710 /* We have these compares. */ 2710 2711 cmp_code = code, code = NE; 2711 2712 break; 2712 2713 2713 2714 case NE: 2714 /* This must be reversed. */ 2715 cmp_code = EQ, code = EQ; 2715 case ORDERED: 2716 /* These must be reversed. */ 2717 cmp_code = reverse_condition (code), code = EQ; 2716 2718 break; 2717 2719 2718 2720 case GE: case GT: case GEU: case GTU: … … 2732 2734 gcc_unreachable (); 2733 2735 } 2734 2736 2737 if (cmp_mode == DImode) 2738 { 2739 if (!reg_or_0_operand (op0, DImode)) 2740 op0 = force_reg (DImode, op0); 2741 if (!reg_or_8bit_operand (op1, DImode)) 2742 op1 = force_reg (DImode, op1); 2743 } 2744 2735 2745 tem = gen_reg_rtx (cmp_mode); 2736 2746 emit_insn (gen_rtx_SET (VOIDmode, tem, 2737 2747 gen_rtx_fmt_ee (cmp_code, cmp_mode, … … 2743 2753 local_fast_math = 1; 2744 2754 } 2745 2755 2756 if (cmp_mode == DImode) 2757 { 2758 if (!reg_or_0_operand (op0, DImode)) 2759 op0 = force_reg (DImode, op0); 2760 if (!reg_or_8bit_operand (op1, DImode)) 2761 op1 = force_reg (DImode, op1); 2762 } 2763 2746 2764 /* We may be able to use a conditional move directly. 2747 2765 This avoids emitting spurious compares. */ 2748 2766 if (signed_comparison_operator (cmp, VOIDmode) … … 2761 2779 switch (code) 2762 2780 { 2763 2781 case EQ: case LE: case LT: case LEU: case LTU: 2782 case UNORDERED: 2764 2783 /* We have these compares: */ 2765 2784 break; 2766 2785 2767 2786 case NE: 2768 /* This must be reversed. */ 2787 case ORDERED: 2788 /* These must be reversed. */ 2769 2789 code = reverse_condition (code); 2770 2790 cmov_code = EQ; 2771 2791 break; … … 9628 9648 } 9629 9649 } 9630 9650 9631 /* Insert an unop between anoreturn function call and GP load. */9651 /* Insert an unop between sibcall or noreturn function call and GP load. */ 9632 9652 9633 9653 static void 9634 alpha_pad_ noreturn(void)9654 alpha_pad_function_end (void) 9635 9655 { 9636 9656 rtx insn, next; 9637 9657 9638 9658 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 9639 9659 { 9640 if (!CALL_P (insn) 9641 || !find_reg_note (insn, REG_NORETURN, NULL_RTX)) 9642 continue; 9660 if (! (CALL_P (insn) 9661 && (SIBLING_CALL_P (insn) 9662 || find_reg_note (insn, REG_NORETURN, NULL_RTX)))) 9663 continue; 9643 9664 9644 9665 next = next_active_insn (insn); 9645 9666 … … 9660 9681 static void 9661 9682 alpha_reorg (void) 9662 9683 { 9663 /* Workaround for a linker error that triggers when an 9664 exception handler immediatelly follows a noreturn function. 9684 /* Workaround for a linker error that triggers when an exception 9685 handler immediatelly follows a sibcall or a noreturn function. 9686 9687 In the sibcall case: 9688 9689 The instruction stream from an object file: 9690 9691 1d8: 00 00 fb 6b jmp (t12) 9692 1dc: 00 00 ba 27 ldah gp,0(ra) 9693 1e0: 00 00 bd 23 lda gp,0(gp) 9694 1e4: 00 00 7d a7 ldq t12,0(gp) 9695 1e8: 00 40 5b 6b jsr ra,(t12),1ec <__funcZ+0x1ec> 9696 9697 was converted in the final link pass to: 9698 9699 12003aa88: 67 fa ff c3 br 120039428 <...> 9700 12003aa8c: 00 00 fe 2f unop 9701 12003aa90: 00 00 fe 2f unop 9702 12003aa94: 48 83 7d a7 ldq t12,-31928(gp) 9703 12003aa98: 00 40 5b 6b jsr ra,(t12),12003aa9c <__func+0x1ec> 9704 9705 And in the noreturn case: 9665 9706 9666 9707 The instruction stream from an object file: 9667 9708 … … 9681 9722 9682 9723 GP load instructions were wrongly cleared by the linker relaxation 9683 9724 pass. This workaround prevents removal of GP loads by inserting 9684 an unop instruction between a noreturn function call and9725 an unop instruction between a sibcall or noreturn function call and 9685 9726 exception handler prologue. */ 9686 9727 9687 9728 if (current_function_has_exception_handlers ()) 9688 alpha_pad_ noreturn();9729 alpha_pad_function_end (); 9689 9730 9690 9731 if (alpha_tp != ALPHA_TP_PROG || flag_exceptions) 9691 9732 alpha_handle_trap_shadows (); -
gcc/config/alpha/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/alpha/linux-unwind.h gcc-4.6.3/gcc/config/alpha/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for Alpha Linux. 2 Copyright (C) 2004, 2005, 2009, 2011 Free Software Foundation, Inc.2 Copyright (C) 2004, 2005, 2009, 2011, 2012 Free Software Foundation, Inc. 3 3 4 4 This file is part of GCC. 5 5 … … 49 49 else if (pc[1] == 0x201f015f) /* lda $0,NR_rt_sigreturn */ 50 50 { 51 51 struct rt_sigframe { 52 s truct siginfoinfo;52 siginfo_t info; 53 53 struct ucontext uc; 54 54 } *rt_ = context->cfa; 55 55 sc = &rt_->uc.uc_mcontext; -
gcc/config/arm/arm.c
diff -Naur gcc-4.6.3.orig/gcc/config/arm/arm.c gcc-4.6.3/gcc/config/arm/arm.c
old new 243 243 static bool fa726te_sched_adjust_cost (rtx, rtx, rtx, int *); 244 244 static enum machine_mode arm_preferred_simd_mode (enum machine_mode); 245 245 static bool arm_class_likely_spilled_p (reg_class_t); 246 static HOST_WIDE_INT arm_vector_alignment (const_tree type); 246 247 static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); 247 248 static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, 248 249 const_tree type, … … 579 580 #undef TARGET_CLASS_LIKELY_SPILLED_P 580 581 #define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p 581 582 583 #undef TARGET_VECTOR_ALIGNMENT 584 #define TARGET_VECTOR_ALIGNMENT arm_vector_alignment 585 582 586 #undef TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE 583 587 #define TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE \ 584 588 arm_vector_alignment_reachable … … 2005 2009 global_options_set.x_param_values); 2006 2010 2007 2011 /* ARM EABI defaults to strict volatile bitfields. */ 2008 if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0) 2012 if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0 2013 && abi_version_at_least(2)) 2009 2014 flag_strict_volatile_bitfields = 1; 2010 2015 2011 2016 /* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed … … 4692 4697 return gen_rtx_REG (mode, pcum->nregs); 4693 4698 } 4694 4699 4700 /* The AAPCS sets the maximum alignment of a vector to 64 bits. */ 4701 static HOST_WIDE_INT 4702 arm_vector_alignment (const_tree type) 4703 { 4704 HOST_WIDE_INT align = tree_low_cst (TYPE_SIZE (type), 0); 4705 4706 if (TARGET_AAPCS_BASED) 4707 align = MIN (align, 64); 4708 4709 return align; 4710 } 4711 4695 4712 static unsigned int 4696 4713 arm_function_arg_boundary (enum machine_mode mode, const_tree type) 4697 4714 { … … 23422 23439 } 23423 23440 } 23424 23441 23425 arm_process_output_memory_barrier (emit, NULL); 23442 /* Note: label is before barrier so that in cmp failure case we still get 23443 a barrier to stop subsequent loads floating upwards past the ldrex 23444 PR target/48126. */ 23426 23445 arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX); 23446 arm_process_output_memory_barrier (emit, NULL); 23427 23447 } 23428 23448 23429 23449 static rtx -
gcc/config/arm/arm.h
diff -Naur gcc-4.6.3.orig/gcc/config/arm/arm.h gcc-4.6.3/gcc/config/arm/arm.h
old new 294 294 #define TARGET_HAVE_DMB (arm_arch7) 295 295 296 296 /* Nonzero if this chip implements a memory barrier via CP15. */ 297 #define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) 297 #define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ 298 && ! TARGET_THUMB1) 298 299 299 300 /* Nonzero if this chip implements a memory barrier instruction. */ 300 301 #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR) -
gcc/config/avr/avr-stdint.h
diff -Naur gcc-4.6.3.orig/gcc/config/avr/avr-stdint.h gcc-4.6.3/gcc/config/avr/avr-stdint.h
old new 1 /* Definitions for <stdint.h> types on systems using newlib. 2 Copyright (C) 2012 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* 21 The intention of this file is to supply definitions that work with 22 avr-gcc's -mint8 that sets int to an 8-bit type. 23 24 This file is intended to yield the same results as newlib-stdint.h, 25 but there are some differences to newlib-stdint.h: 26 27 - AVR is an 8-bit architecture that cannot access 16-bit values 28 atomically, this SIG_ATOMIC_TYPE is "char". 29 30 - For the same reason, [u]int_fast8_t is defined as 8-bit type. 31 32 */ 33 34 #define SIG_ATOMIC_TYPE "char" 35 36 #define INT8_TYPE "signed char" 37 #define INT16_TYPE (INT_TYPE_SIZE == 16 ? "short int" : "long int") 38 #define INT32_TYPE (INT_TYPE_SIZE == 16 ? "long int" : "long long int") 39 #define INT64_TYPE (INT_TYPE_SIZE == 16 ? "long long int" : 0) 40 #define UINT8_TYPE "unsigned char" 41 #define UINT16_TYPE (INT_TYPE_SIZE == 16 ? "short unsigned int" : "long unsigned int") 42 #define UINT32_TYPE (INT_TYPE_SIZE == 16 ? "long unsigned int" : "long long unsigned int") 43 #define UINT64_TYPE (INT_TYPE_SIZE == 16 ? "long long unsigned int" : 0) 44 45 #define INT_LEAST8_TYPE INT8_TYPE 46 #define INT_LEAST16_TYPE INT16_TYPE 47 #define INT_LEAST32_TYPE INT32_TYPE 48 #define INT_LEAST64_TYPE INT64_TYPE 49 #define UINT_LEAST8_TYPE UINT8_TYPE 50 #define UINT_LEAST16_TYPE UINT16_TYPE 51 #define UINT_LEAST32_TYPE UINT32_TYPE 52 #define UINT_LEAST64_TYPE UINT64_TYPE 53 54 #define INT_FAST8_TYPE INT8_TYPE 55 #define INT_FAST16_TYPE (INT_TYPE_SIZE == 16 ? "int" : INT16_TYPE) 56 #define INT_FAST32_TYPE INT32_TYPE 57 #define INT_FAST64_TYPE INT64_TYPE 58 #define UINT_FAST8_TYPE UINT8_TYPE 59 #define UINT_FAST16_TYPE (INT_TYPE_SIZE == 16 ? "unsigned int" : UINT16_TYPE) 60 #define UINT_FAST32_TYPE UINT32_TYPE 61 #define UINT_FAST64_TYPE UINT64_TYPE 62 63 #define INTPTR_TYPE PTRDIFF_TYPE 64 #ifndef UINTPTR_TYPE 65 #define UINTPTR_TYPE SIZE_TYPE 66 #endif -
gcc/config/avr/avr.c
diff -Naur gcc-4.6.3.orig/gcc/config/avr/avr.c gcc-4.6.3/gcc/config/avr/avr.c
old new 1879 1879 } 1880 1880 else if (test_hard_reg_class (STACK_REG, src)) 1881 1881 { 1882 *l = 2; 1883 return AVR_HAVE_8BIT_SP 1884 ? (AS2 (in,%A0,__SP_L__) CR_TAB 1885 AS1 (clr,%B0)) 1886 : (AS2 (in,%A0,__SP_L__) CR_TAB 1887 AS2 (in,%B0,__SP_H__)); 1882 *l = 2; 1883 return (AS2 (in,%A0,__SP_L__) CR_TAB 1884 AS2 (in,%B0,__SP_H__)); 1888 1885 } 1889 1886 1890 1887 if (AVR_HAVE_MOVW) … … 5177 5174 5178 5175 default_file_start (); 5179 5176 5180 fputs ("__SREG__ = 0x3f\n", asm_out_file); 5181 if (!AVR_HAVE_8BIT_SP) 5182 fputs ("__SP_H__ = 0x3e\n", asm_out_file); 5183 fputs ("__SP_L__ = 0x3d\n", asm_out_file); 5177 fputs ("__SREG__ = 0x3f\n" 5178 "__SP_H__ = 0x3e\n" 5179 "__SP_L__ = 0x3d\n", asm_out_file); 5184 5180 5185 5181 fputs ("__tmp_reg__ = 0\n" 5186 5182 "__zero_reg__ = 1\n", asm_out_file); -
gcc/config/avr/avr.md
diff -Naur gcc-4.6.3.orig/gcc/config/avr/avr.md gcc-4.6.3/gcc/config/avr/avr.md
old new 299 299 [(set (match_operand:HI 0 "stack_register_operand" "=q") 300 300 (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] 301 301 UNSPECV_WRITE_SP_IRQ_OFF))] 302 " !AVR_HAVE_8BIT_SP"302 "" 303 303 "out __SP_H__, %B1 304 304 out __SP_L__, %A1" 305 305 [(set_attr "length" "2") … … 309 309 [(set (match_operand:HI 0 "stack_register_operand" "=q") 310 310 (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] 311 311 UNSPECV_WRITE_SP_IRQ_ON))] 312 " !AVR_HAVE_8BIT_SP"312 "" 313 313 "cli 314 314 out __SP_H__, %B1 315 315 sei -
gcc/config/avr/libgcc.S
diff -Naur gcc-4.6.3.orig/gcc/config/avr/libgcc.S gcc-4.6.3/gcc/config/avr/libgcc.S
old new 582 582 push r17 583 583 push r28 584 584 push r29 585 #if defined (__AVR_HAVE_8BIT_SP__)586 ;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level587 ;; so this lines are dead code. To make it work, devices without588 ;; SP_H must get their own multilib(s), see PR51345.589 in r28,__SP_L__590 sub r28,r26591 clr r29592 out __SP_L__,r28593 #else594 585 in r28,__SP_L__ 595 586 in r29,__SP_H__ 596 587 sub r28,r26 … … 600 591 out __SP_H__,r29 601 592 out __SREG__,__tmp_reg__ 602 593 out __SP_L__,r28 603 #endif604 594 #if defined (__AVR_HAVE_EIJMP_EICALL__) 605 595 eijmp 606 596 #else … … 635 625 ldd r16,Y+4 636 626 ldd r17,Y+3 637 627 ldd r26,Y+2 638 #if defined (__AVR_HAVE_8BIT_SP__)639 ;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level640 ;; so this lines are dead code. To make it work, devices without641 ;; SP_H must get their own multilib(s).642 ldd r29,Y+1643 add r28,r30644 out __SP_L__,r28645 mov r28, r26646 #else647 628 ldd r27,Y+1 648 629 add r28,r30 649 630 adc r29,__zero_reg__ … … 654 635 out __SP_L__,r28 655 636 mov_l r28, r26 656 637 mov_h r29, r27 657 #endif658 638 ret 659 639 .endfunc 660 640 #endif /* defined (L_epilogue) */ -
gcc/config/bfin/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/bfin/linux-unwind.h gcc-4.6.3/gcc/config/bfin/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for Blackfin. 2 Copyright (C) 2007, 2009 Free Software Foundation, Inc.2 Copyright (C) 2007, 2009, 2012 Free Software Foundation, Inc. 3 3 4 4 This file is part of GCC. 5 5 … … 48 48 { 49 49 struct rt_sigframe { 50 50 int sig; 51 s truct siginfo*pinfo;51 siginfo_t *pinfo; 52 52 void *puc; 53 53 char retcode[8]; 54 s truct siginfoinfo;54 siginfo_t info; 55 55 struct ucontext uc; 56 56 } *rt_ = context->cfa; 57 57 -
gcc/config/h8300/h8300.c
diff -Naur gcc-4.6.3.orig/gcc/config/h8300/h8300.c gcc-4.6.3/gcc/config/h8300/h8300.c
old new 416 416 } 417 417 418 418 /* This target defaults to strict volatile bitfields. */ 419 if (flag_strict_volatile_bitfields < 0 )419 if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) 420 420 flag_strict_volatile_bitfields = 1; 421 421 } 422 422 -
gcc/config/host-linux.c
diff -Naur gcc-4.6.3.orig/gcc/config/host-linux.c gcc-4.6.3/gcc/config/host-linux.c
old new 84 84 # define TRY_EMPTY_VM_SPACE 0x60000000 85 85 #elif defined(__mc68000__) 86 86 # define TRY_EMPTY_VM_SPACE 0x40000000 87 #elif defined(__ARM_EABI__) 88 # define TRY_EMPTY_VM_SPACE 0x60000000 87 89 #else 88 90 # define TRY_EMPTY_VM_SPACE 0 89 91 #endif -
gcc/config/i386/driver-i386.c
diff -Naur gcc-4.6.3.orig/gcc/config/i386/driver-i386.c gcc-4.6.3/gcc/config/i386/driver-i386.c
old new 397 397 unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0; 398 398 unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0; 399 399 unsigned int has_bmi = 0, has_tbm = 0; 400 unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0; 400 401 401 402 bool arch; 402 403 … … 444 445 has_aes = ecx & bit_AES; 445 446 has_pclmul = ecx & bit_PCLMUL; 446 447 has_fma = ecx & bit_FMA; 448 has_f16c = ecx & bit_F16C; 449 has_rdrnd = ecx & bit_RDRND; 447 450 448 451 has_cmpxchg8b = edx & bit_CMPXCHG8B; 449 452 has_cmov = edx & bit_CMOV; … … 451 454 has_sse = edx & bit_SSE; 452 455 has_sse2 = edx & bit_SSE2; 453 456 457 if (max_level >= 7) 458 { 459 __cpuid_count (7, 0, eax, ebx, ecx, edx); 460 461 has_fsgsbase = ebx & bit_FSGSBASE; 462 } 463 454 464 /* Check cpuid level of extended features. */ 455 465 __cpuid (0x80000000, ext_level, ebx, ecx, edx); 456 466 … … 711 721 const char *avx = has_avx ? " -mavx" : " -mno-avx"; 712 722 const char *sse4_2 = has_sse4_2 ? " -msse4.2" : " -mno-sse4.2"; 713 723 const char *sse4_1 = has_sse4_1 ? " -msse4.1" : " -mno-sse4.1"; 724 const char *rdrnd = has_rdrnd ? " -mrdrnd" : " -mno-rdrnd"; 725 const char *f16c = has_f16c ? " -mf16c" : " -mno-f16c"; 726 const char *fsgsbase = has_fsgsbase ? " -mfsgsbase" : " -mno-fsgsbase"; 714 727 715 728 options = concat (options, cx16, sahf, movbe, ase, pclmul, 716 729 popcnt, abm, lwp, fma, fma4, xop, bmi, tbm, 717 avx, sse4_2, sse4_1, NULL);730 avx, sse4_2, sse4_1, rdrnd, f16c, fsgsbase, NULL); 718 731 } 719 732 720 733 done: -
gcc/config/i386/i386-protos.h
diff -Naur gcc-4.6.3.orig/gcc/config/i386/i386-protos.h gcc-4.6.3/gcc/config/i386/i386-protos.h
old new 59 59 extern bool constant_address_p (rtx); 60 60 extern bool legitimate_pic_operand_p (rtx); 61 61 extern bool legitimate_pic_address_disp_p (rtx); 62 62 extern bool ix86_legitimize_reload_address (rtx, enum machine_mode, 63 int, int, int); 63 64 extern void print_reg (rtx, int, FILE*); 64 65 extern void ix86_print_operand (FILE *, rtx, int); 65 66 -
gcc/config/i386/i386.c
diff -Naur gcc-4.6.3.orig/gcc/config/i386/i386.c gcc-4.6.3/gcc/config/i386/i386.c
old new 46 46 #include "target.h" 47 47 #include "target-def.h" 48 48 #include "langhooks.h" 49 #include "reload.h" 49 50 #include "cgraph.h" 50 51 #include "gimple.h" 51 52 #include "dwarf2.h" … … 2094 2095 /* Feature tests against the various architecture variations, used to create 2095 2096 ix86_arch_features based on the processor mask. */ 2096 2097 static unsigned int initial_ix86_arch_features[X86_ARCH_LAST] = { 2097 /* X86_ARCH_CMOV E: Conditional move was added for pentiumpro. */2098 /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */ 2098 2099 ~(m_386 | m_486 | m_PENT | m_K6), 2099 2100 2100 2101 /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */ … … 3811 3812 -mtune (rather than -march) points us to a processor that has them. 3812 3813 However, the VIA C3 gives a SIGILL, so we only do that for i686 and 3813 3814 higher processors. */ 3814 if (TARGET_CMOV E3815 if (TARGET_CMOV 3815 3816 && (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))) 3816 3817 x86_prefetch_sse = true; 3817 3818 break; … … 4181 4182 target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS; 4182 4183 } 4183 4184 4184 /* For sane SSE instruction set generation we need fcomi instruction.4185 It is safe to enable all CMOVE instructions. Also, RDRAND intrinsic4186 expands to a sequence that includes conditional move. */4187 if (TARGET_SSE || TARGET_RDRND)4188 TARGET_CMOVE = 1;4189 4190 4185 /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */ 4191 4186 { 4192 4187 char *p; … … 12168 12163 return false; 12169 12164 } 12170 12165 12166 /* Our implementation of LEGITIMIZE_RELOAD_ADDRESS. Returns a value to 12167 replace the input X, or the original X if no replacement is called for. 12168 The output parameter *WIN is 1 if the calling macro should goto WIN, 12169 0 if it should not. */ 12170 12171 bool 12172 ix86_legitimize_reload_address (rtx x, 12173 enum machine_mode mode ATTRIBUTE_UNUSED, 12174 int opnum, int type, 12175 int ind_levels ATTRIBUTE_UNUSED) 12176 { 12177 /* Reload can generate: 12178 12179 (plus:DI (plus:DI (unspec:DI [(const_int 0 [0])] UNSPEC_TP) 12180 (reg:DI 97)) 12181 (reg:DI 2 cx)) 12182 12183 This RTX is rejected from ix86_legitimate_address_p due to 12184 non-strictness of base register 97. Following this rejection, 12185 reload pushes all three components into separate registers, 12186 creating invalid memory address RTX. 12187 12188 Following code reloads only the invalid part of the 12189 memory address RTX. */ 12190 12191 if (GET_CODE (x) == PLUS 12192 && REG_P (XEXP (x, 1)) 12193 && GET_CODE (XEXP (x, 0)) == PLUS 12194 && REG_P (XEXP (XEXP (x, 0), 1))) 12195 { 12196 rtx base, index; 12197 bool something_reloaded = false; 12198 12199 base = XEXP (XEXP (x, 0), 1); 12200 if (!REG_OK_FOR_BASE_STRICT_P (base)) 12201 { 12202 push_reload (base, NULL_RTX, &XEXP (XEXP (x, 0), 1), NULL, 12203 BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, 12204 opnum, (enum reload_type)type); 12205 something_reloaded = true; 12206 } 12207 12208 index = XEXP (x, 1); 12209 if (!REG_OK_FOR_INDEX_STRICT_P (index)) 12210 { 12211 push_reload (index, NULL_RTX, &XEXP (x, 1), NULL, 12212 INDEX_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, 12213 opnum, (enum reload_type)type); 12214 something_reloaded = true; 12215 } 12216 12217 gcc_assert (something_reloaded); 12218 return true; 12219 } 12220 12221 return false; 12222 } 12223 12171 12224 /* Recognizes RTL expressions that are valid memory addresses for an 12172 12225 instruction. The MODE argument is the machine mode for the MEM 12173 12226 expression that wants to use this address. … … 27177 27230 arg_adjust = 0; 27178 27231 if (optimize 27179 27232 || target == 0 27180 || GET_MODE (target) != tmode27181 || !insn_p->operand[0].predicate (target, tmode))27233 || !register_operand (target, tmode) 27234 || GET_MODE (target) != tmode) 27182 27235 target = gen_reg_rtx (tmode); 27183 27236 } 27184 27237 … … 31377 31430 tmp = gen_reg_rtx (GET_MODE_INNER (mode)); 31378 31431 ix86_expand_vector_extract (true, tmp, target, 1 - elt); 31379 31432 if (elt == 0) 31380 tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);31381 else31382 31433 tmp = gen_rtx_VEC_CONCAT (mode, val, tmp); 31434 else 31435 tmp = gen_rtx_VEC_CONCAT (mode, tmp, val); 31383 31436 emit_insn (gen_rtx_SET (VOIDmode, target, tmp)); 31384 31437 return; 31385 31438 } … … 31393 31446 tmp = gen_reg_rtx (GET_MODE_INNER (mode)); 31394 31447 ix86_expand_vector_extract (false, tmp, target, 1 - elt); 31395 31448 if (elt == 0) 31396 tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);31397 else31398 31449 tmp = gen_rtx_VEC_CONCAT (mode, val, tmp); 31450 else 31451 tmp = gen_rtx_VEC_CONCAT (mode, tmp, val); 31399 31452 emit_insn (gen_rtx_SET (VOIDmode, target, tmp)); 31400 31453 return; 31401 31454 … … 32823 32876 return ix86_cost->cond_not_taken_branch_cost; 32824 32877 32825 32878 case vec_perm: 32826 return 1; 32879 case vec_promote_demote: 32880 return ix86_cost->vec_stmt_cost; 32827 32881 32828 32882 default: 32829 32883 gcc_unreachable (); -
gcc/config/i386/i386.h
diff -Naur gcc-4.6.3.orig/gcc/config/i386/i386.h gcc-4.6.3/gcc/config/i386/i386.h
old new 424 424 425 425 /* Feature tests against the various architecture variations. */ 426 426 enum ix86_arch_indices { 427 X86_ARCH_CMOV E, /* || TARGET_SSE */427 X86_ARCH_CMOV, 428 428 X86_ARCH_CMPXCHG, 429 429 X86_ARCH_CMPXCHG8B, 430 430 X86_ARCH_XADD, … … 435 435 436 436 extern unsigned char ix86_arch_features[X86_ARCH_LAST]; 437 437 438 #define TARGET_CMOV E ix86_arch_features[X86_ARCH_CMOVE]438 #define TARGET_CMOV ix86_arch_features[X86_ARCH_CMOV] 439 439 #define TARGET_CMPXCHG ix86_arch_features[X86_ARCH_CMPXCHG] 440 440 #define TARGET_CMPXCHG8B ix86_arch_features[X86_ARCH_CMPXCHG8B] 441 441 #define TARGET_XADD ix86_arch_features[X86_ARCH_XADD] 442 442 #define TARGET_BSWAP ix86_arch_features[X86_ARCH_BSWAP] 443 443 444 /* For sane SSE instruction set generation we need fcomi instruction. 445 It is safe to enable all CMOVE instructions. Also, RDRAND intrinsic 446 expands to a sequence that includes conditional move. */ 447 #define TARGET_CMOVE (TARGET_CMOV || TARGET_SSE || TARGET_RDRND) 448 444 449 #define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387) 445 450 446 451 extern int x86_prefetch_sse; … … 1668 1673 1669 1674 #define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 1670 1675 1676 /* Try a machine-dependent way of reloading an illegitimate address 1677 operand. If we find one, push the reload and jump to WIN. This 1678 macro is used in only one place: `find_reloads_address' in reload.c. */ 1679 1680 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, INDL, WIN) \ 1681 do { \ 1682 if (ix86_legitimize_reload_address ((X), (MODE), (OPNUM), \ 1683 (int)(TYPE), (INDL))) \ 1684 goto WIN; \ 1685 } while (0) 1686 1671 1687 /* If defined, a C expression to determine the base term of address X. 1672 1688 This macro is used in only one place: `find_base_term' in alias.c. 1673 1689 -
gcc/config/i386/i386.md
diff -Naur gcc-4.6.3.orig/gcc/config/i386/i386.md gcc-4.6.3/gcc/config/i386/i386.md
old new 233 233 234 234 ;; For BMI support 235 235 UNSPEC_BEXTR 236 237 ;; For RDRAND support238 UNSPEC_RDRAND239 236 ]) 240 237 241 238 (define_c_enum "unspecv" [ … … 270 267 UNSPECV_WRFSBASE 271 268 UNSPECV_WRGSBASE 272 269 UNSPECV_SPLIT_STACK_RETURN 270 271 ;; For RDRAND support 272 UNSPECV_RDRAND 273 273 ]) 274 274 275 275 ;; Constants to represent pcomtrue/pcomfalse variants … … 16349 16349 (define_insn "*x86_mov<mode>cc_0_m1_neg" 16350 16350 [(set (match_operand:SWI48 0 "register_operand" "=r") 16351 16351 (neg:SWI48 (match_operator 1 "ix86_carry_flag_operator" 16352 [(reg FLAGS_REG) (const_int 0)])))] 16352 [(reg FLAGS_REG) (const_int 0)]))) 16353 (clobber (reg:CC FLAGS_REG))] 16353 16354 "" 16354 16355 "sbb{<imodesuffix>}\t%0, %0" 16355 16356 [(set_attr "type" "alu") … … 18357 18358 18358 18359 (define_insn "rdrand<mode>_1" 18359 18360 [(set (match_operand:SWI248 0 "register_operand" "=r") 18360 (unspec :SWI248 [(const_int 0)] UNSPEC_RDRAND))18361 (unspec_volatile:SWI248 [(const_int 0)] UNSPECV_RDRAND)) 18361 18362 (set (reg:CCC FLAGS_REG) 18362 (unspec :CCC [(const_int 0)] UNSPEC_RDRAND))]18363 (unspec_volatile:CCC [(const_int 0)] UNSPECV_RDRAND))] 18363 18364 "TARGET_RDRND" 18364 18365 "rdrand\t%0" 18365 18366 [(set_attr "type" "other") -
gcc/config/i386/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/i386/linux-unwind.h gcc-4.6.3/gcc/config/i386/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for AMD x86-64 and x86. 2 Copyright (C) 2004, 2005, 2006, 2009, 2010 Free Software Foundation, Inc. 2 Copyright (C) 2004, 2005, 2006, 2009, 2010, 2012 Free Software Foundation, 3 Inc. 3 4 4 5 This file is part of GCC. 5 6 … … 133 134 { 134 135 struct rt_sigframe { 135 136 int sig; 136 s truct siginfo*pinfo;137 siginfo_t *pinfo; 137 138 void *puc; 138 s truct siginfoinfo;139 siginfo_t info; 139 140 struct ucontext uc; 140 141 } *rt_ = context->cfa; 141 142 /* The void * cast is necessary to avoid an aliasing warning. -
gcc/config/i386/sse.md
diff -Naur gcc-4.6.3.orig/gcc/config/i386/sse.md gcc-4.6.3/gcc/config/i386/sse.md
old new 392 392 DONE; 393 393 }) 394 394 395 (define_expand "avx_movu<ssemodesuffix><avxmodesuffix>" 396 [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "") 397 (unspec:AVXMODEF2P 398 [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "")] 399 UNSPEC_MOVU))] 400 "AVX_VEC_FLOAT_MODE_P (<MODE>mode)" 401 { 402 if (MEM_P (operands[0]) && MEM_P (operands[1])) 403 operands[1] = force_reg (<MODE>mode, operands[1]); 404 }) 405 406 (define_insn "*avx_movu<ssemodesuffix><avxmodesuffix>" 395 (define_insn "avx_movu<ssemodesuffix><avxmodesuffix>" 407 396 [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m") 408 397 (unspec:AVXMODEF2P 409 398 [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")] … … 429 418 (set_attr "prefix" "maybe_vex") 430 419 (set_attr "mode" "TI")]) 431 420 432 (define_expand "<sse>_movu<ssemodesuffix>" 433 [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "") 434 (unspec:SSEMODEF2P 435 [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")] 436 UNSPEC_MOVU))] 437 "SSE_VEC_FLOAT_MODE_P (<MODE>mode)" 438 { 439 if (MEM_P (operands[0]) && MEM_P (operands[1])) 440 operands[1] = force_reg (<MODE>mode, operands[1]); 441 }) 442 443 (define_insn "*<sse>_movu<ssemodesuffix>" 421 (define_insn "<sse>_movu<ssemodesuffix>" 444 422 [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m") 445 423 (unspec:SSEMODEF2P 446 424 [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")] … … 452 430 (set_attr "movu" "1") 453 431 (set_attr "mode" "<MODE>")]) 454 432 455 (define_expand "avx_movdqu<avxmodesuffix>" 456 [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "") 457 (unspec:AVXMODEQI 458 [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "")] 459 UNSPEC_MOVU))] 460 "TARGET_AVX" 461 { 462 if (MEM_P (operands[0]) && MEM_P (operands[1])) 463 operands[1] = force_reg (<MODE>mode, operands[1]); 464 }) 465 466 (define_insn "*avx_movdqu<avxmodesuffix>" 433 (define_insn "avx_movdqu<avxmodesuffix>" 467 434 [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "=x,m") 468 435 (unspec:AVXMODEQI 469 436 [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")] … … 475 442 (set_attr "prefix" "vex") 476 443 (set_attr "mode" "<avxvecmode>")]) 477 444 478 (define_expand "sse2_movdqu" 479 [(set (match_operand:V16QI 0 "nonimmediate_operand" "") 480 (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "")] 481 UNSPEC_MOVU))] 482 "TARGET_SSE2" 483 { 484 if (MEM_P (operands[0]) && MEM_P (operands[1])) 485 operands[1] = force_reg (V16QImode, operands[1]); 486 }) 487 488 (define_insn "*sse2_movdqu" 445 (define_insn "sse2_movdqu" 489 446 [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m") 490 447 (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")] 491 448 UNSPEC_MOVU))] … … 1324 1281 (parallel [(const_int 0)])) 1325 1282 (vec_select:DF (match_dup 1) (parallel [(const_int 1)]))) 1326 1283 (plusminus:DF 1327 (vec_select:DF (match_dup 1) (parallel [(const_int 2)]))1328 (vec_select:DF (match_dup 1) (parallel [(const_int 3)]))))1329 (vec_concat:V2DF1330 (plusminus:DF1331 1284 (vec_select:DF 1332 1285 (match_operand:V4DF 2 "nonimmediate_operand" "xm") 1333 1286 (parallel [(const_int 0)])) 1334 (vec_select:DF (match_dup 2) (parallel [(const_int 1)]))) 1287 (vec_select:DF (match_dup 2) (parallel [(const_int 1)])))) 1288 (vec_concat:V2DF 1289 (plusminus:DF 1290 (vec_select:DF (match_dup 1) (parallel [(const_int 2)])) 1291 (vec_select:DF (match_dup 1) (parallel [(const_int 3)]))) 1335 1292 (plusminus:DF 1336 1293 (vec_select:DF (match_dup 2) (parallel [(const_int 2)])) 1337 1294 (vec_select:DF (match_dup 2) (parallel [(const_int 3)]))))))] … … 5058 5015 (vec_select:DF (match_dup 0) (parallel [(const_int 1)]))))] 5059 5016 "TARGET_SSE2 && reload_completed" 5060 5017 [(set (match_dup 0) (match_dup 1))] 5061 "operands[0] = adjust_address (operands[0], DFmode, 8);")5018 "operands[0] = adjust_address (operands[0], DFmode, 0);") 5062 5019 5063 5020 ;; Not sure these two are ever used, but it doesn't hurt to have 5064 5021 ;; them. -aoliva … … 12095 12052 (unspec:V8SF [(match_operand:V8HI 1 "register_operand" "x")] 12096 12053 UNSPEC_VCVTPH2PS) 12097 12054 (parallel [(const_int 0) (const_int 1) 12098 (const_int 1) (const_int 2)])))]12055 (const_int 2) (const_int 3)])))] 12099 12056 "TARGET_F16C" 12100 12057 "vcvtph2ps\t{%1, %0|%0, %1}" 12101 12058 [(set_attr "type" "ssecvt") -
gcc/config/ia64/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/ia64/linux-unwind.h gcc-4.6.3/gcc/config/ia64/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for IA64 Linux. 2 Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc.2 Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. 3 3 4 4 This file is part of GCC. 5 5 … … 47 47 struct sigframe { 48 48 char scratch[16]; 49 49 unsigned long sig_number; 50 s truct siginfo*info;50 siginfo_t *info; 51 51 struct sigcontext *sc; 52 52 } *frame_ = (struct sigframe *)context->psp; 53 53 struct sigcontext *sc = frame_->sc; … … 137 137 struct sigframe { 138 138 char scratch[16]; 139 139 unsigned long sig_number; 140 s truct siginfo*info;140 siginfo_t *info; 141 141 struct sigcontext *sc; 142 142 } *frame = (struct sigframe *)context->psp; 143 143 struct sigcontext *sc = frame->sc; -
gcc/config/m32c/m32c.c
diff -Naur gcc-4.6.3.orig/gcc/config/m32c/m32c.c gcc-4.6.3/gcc/config/m32c/m32c.c
old new 447 447 flag_ivopts = 0; 448 448 449 449 /* This target defaults to strict volatile bitfields. */ 450 if (flag_strict_volatile_bitfields < 0 )450 if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) 451 451 flag_strict_volatile_bitfields = 1; 452 452 453 453 /* r8c/m16c have no 16-bit indirect call, so thunks are involved. -
gcc/config/mips/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/mips/linux-unwind.h gcc-4.6.3/gcc/config/mips/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for MIPS Linux. 2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. 2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2012 Free Software 3 Foundation, Inc. 3 4 4 5 This file is part of GCC. 5 6 … … 75 76 struct rt_sigframe { 76 77 u_int32_t ass[4]; /* Argument save space for o32. */ 77 78 u_int32_t trampoline[2]; 78 s truct siginfoinfo;79 siginfo_t info; 79 80 _sig_ucontext_t uc; 80 81 } *rt_ = context->cfa; 81 82 sc = &rt_->uc.uc_mcontext; -
gcc/config/mn10300/mn10300.c
diff -Naur gcc-4.6.3.orig/gcc/config/mn10300/mn10300.c gcc-4.6.3/gcc/config/mn10300/mn10300.c
old new 2505 2505 may access it using GOTOFF instead of GOT. */ 2506 2506 2507 2507 static void 2508 mn10300_encode_section_info (tree decl, rtx rtl, int first ATTRIBUTE_UNUSED)2508 mn10300_encode_section_info (tree decl, rtx rtl, int first) 2509 2509 { 2510 2510 rtx symbol; 2511 2511 2512 default_encode_section_info (decl, rtl, first); 2513 2512 2514 if (! MEM_P (rtl)) 2513 2515 return; 2516 2514 2517 symbol = XEXP (rtl, 0); 2515 2518 if (GET_CODE (symbol) != SYMBOL_REF) 2516 2519 return; -
gcc/config/pa/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/pa/linux-unwind.h gcc-4.6.3/gcc/config/pa/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for PA Linux. 2 Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc.2 Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. 3 3 4 4 This file is part of GCC. 5 5 … … 63 63 int i; 64 64 struct sigcontext *sc; 65 65 struct rt_sigframe { 66 s truct siginfoinfo;66 siginfo_t info; 67 67 struct ucontext uc; 68 68 } *frame; 69 69 -
gcc/config/pa/pa-protos.h
diff -Naur gcc-4.6.3.orig/gcc/config/pa/pa-protos.h gcc-4.6.3/gcc/config/pa/pa-protos.h
old new 136 136 extern int cint_ok_for_move (HOST_WIDE_INT); 137 137 extern void hppa_expand_prologue (void); 138 138 extern void hppa_expand_epilogue (void); 139 extern bool pa_can_use_return_insn (void); 139 140 extern int ior_mask_p (unsigned HOST_WIDE_INT); 140 141 extern void compute_zdepdi_operands (unsigned HOST_WIDE_INT, 141 142 unsigned *); -
gcc/config/pa/pa.c
diff -Naur gcc-4.6.3.orig/gcc/config/pa/pa.c gcc-4.6.3/gcc/config/pa/pa.c
old new 185 185 static void pa_conditional_register_usage (void); 186 186 static enum machine_mode pa_c_mode_for_suffix (char); 187 187 static section *pa_function_section (tree, enum node_frequency, bool, bool); 188 static unsigned int pa_section_type_flags (tree, const char *, int); 188 189 189 190 /* The following extra sections are only used for SOM. */ 190 191 static GTY(()) section *som_readonly_data_section; … … 400 401 #undef TARGET_ASM_FUNCTION_SECTION 401 402 #define TARGET_ASM_FUNCTION_SECTION pa_function_section 402 403 404 #undef TARGET_SECTION_TYPE_FLAGS 405 #define TARGET_SECTION_TYPE_FLAGS pa_section_type_flags 406 403 407 struct gcc_target targetm = TARGET_INITIALIZER; 404 408 405 409 -
gcc/config/pa/pa.h
/* Parse the -mfixed-range= option string. */ @@ -4442,6 +4446,24 @@ } } +bool +pa_can_use_return_insn (void) +{ + if (!reload_completed) + return false; + + if (frame_pointer_needed) + return false; + + if (df_regs_ever_live_p (2)) + return false; + + if (crtl->profile) + return false; + + return compute_frame_size (get_frame_size (), 0) == 0; +} + rtx hppa_pic_save_rtx (void) { @@ -4586,7 +4608,7 @@ rtx saved_rp; rtx ins; - /* Instruction stream at the normal return address for the export stub: + /* The instruction stream at the return address of a PA1.X export stub is: 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp 0x004010a1 | stub+12: ldsid (sr0,rp),r1 @@ -4594,10 +4616,16 @@ 0xe0400002 | stub+20: be,n 0(sr0,rp) 0xe0400002 must be specified as -532676606 so that it won't be - rejected as an invalid immediate operand on 64-bit hosts. */ + rejected as an invalid immediate operand on 64-bit hosts. - HOST_WIDE_INT insns[4] = {0x4bc23fd1, 0x004010a1, 0x00011820, -532676606}; - int i; + The instruction stream at the return address of a PA2.0 export stub is: + + 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp + 0xe840d002 | stub+12: bve,n (rp) + */ + + HOST_WIDE_INT insns[4]; + int i, len; if (count != 0) return NULL_RTX; @@ -4620,11 +4648,26 @@ ins = copy_to_reg (gen_rtx_AND (Pmode, rp, MASK_RETURN_ADDR)); label = gen_label_rtx (); + if (TARGET_PA_20) + { + insns[0] = 0x4bc23fd1; + insns[1] = -398405630; + len = 2; + } + else + { + insns[0] = 0x4bc23fd1; + insns[1] = 0x004010a1; + insns[2] = 0x00011820; + insns[3] = -532676606; + len = 4; + } + /* Check the instruction stream at the normal return address for the export stub. If it is an export stub, than our return address is really in -24[frameaddr]. */ - for (i = 0; i < 3; i++) + for (i = 0; i < len; i++) { rtx op0 = gen_rtx_MEM (SImode, plus_constant (ins, i * 4)); rtx op1 = GEN_INT (insns[i]); @@ -7501,7 +7544,7 @@ return 24; else { - if (!TARGET_LONG_CALLS && distance < 240000) + if (!TARGET_LONG_CALLS && distance < MAX_PCREL17F_OFFSET) return 8; if (TARGET_LONG_ABS_CALL && !flag_pic) @@ -7714,7 +7757,7 @@ /* pc-relative branch. */ if (!TARGET_LONG_CALLS && ((TARGET_PA_20 && !sibcall && distance < 7600000) - || distance < 240000)) + || distance < MAX_PCREL17F_OFFSET)) length += 8; /* 64-bit plabel sequence. */ @@ -8073,7 +8116,7 @@ if (TARGET_FAST_INDIRECT_CALLS || (!TARGET_PORTABLE_RUNTIME && ((TARGET_PA_20 && !TARGET_SOM && distance < 7600000) - || distance < 240000))) + || distance < MAX_PCREL17F_OFFSET))) return 8; if (flag_pic) @@ -10392,4 +10435,23 @@ return default_function_section (decl, freq, startup, exit); } +/* Implement TARGET_SECTION_TYPE_FLAGS. */ + +static unsigned int +pa_section_type_flags (tree decl, const char *name, int reloc) +{ + unsigned int flags; + + flags = default_section_type_flags (decl, name, reloc); + + /* Function labels are placed in the constant pool. This can + cause a section conflict if decls are put in ".data.rel.ro" + or ".data.rel.ro.local" using the __attribute__ construct. */ + if (strcmp (name, ".data.rel.ro") == 0 + || strcmp (name, ".data.rel.ro.local") == 0) + flags |= SECTION_WRITE | SECTION_RELRO; + + return flags; +} + #include "gt-pa.h" diff -Naur gcc-4.6.3.orig/gcc/config/pa/pa.h gcc-4.6.3/gcc/config/pa/pa.h
old new 1563 1563 #undef TARGET_HAVE_TLS 1564 1564 #define TARGET_HAVE_TLS true 1565 1565 #endif 1566 1567 /* The maximum offset in bytes for a PA 1.X pc-relative call to the 1568 head of the preceding stub table. The selected offsets have been 1569 chosen so that approximately one call stub is allocated for every 1570 86.7 instructions. A long branch stub is two instructions when 1571 not generating PIC code. For HP-UX and ELF targets, PIC stubs are 1572 seven and four instructions, respectively. */ 1573 #define MAX_PCREL17F_OFFSET \ 1574 (flag_pic ? (TARGET_HPUX ? 198164 : 221312) : 240000) -
gcc/config/pa/pa.md
diff -Naur gcc-4.6.3.orig/gcc/config/pa/pa.md gcc-4.6.3/gcc/config/pa/pa.md
old new 6348 6348 "" 6349 6349 "* 6350 6350 { 6351 int x =INTVAL (operands[1]);6351 unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); 6352 6352 operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); 6353 6353 operands[1] = GEN_INT ((x & 0xf) - 0x10); 6354 6354 return \"{zvdepi %1,%2,%0|depwi,z %1,%%sar,%2,%0}\"; … … 6366 6366 "exact_log2 (INTVAL (operands[1]) + 1) > 0" 6367 6367 "* 6368 6368 { 6369 intx = INTVAL (operands[1]);6369 HOST_WIDE_INT x = INTVAL (operands[1]); 6370 6370 operands[2] = GEN_INT (exact_log2 (x + 1)); 6371 6371 return \"{vdepi -1,%2,%0|depwi -1,%%sar,%2,%0}\"; 6372 6372 }" … … 6383 6383 "INTVAL (operands[1]) == -2" 6384 6384 "* 6385 6385 { 6386 intx = INTVAL (operands[1]);6386 HOST_WIDE_INT x = INTVAL (operands[1]); 6387 6387 operands[2] = GEN_INT (exact_log2 ((~x) + 1)); 6388 6388 return \"{vdepi 0,%2,%0|depwi 0,%%sar,%2,%0}\"; 6389 6389 }" … … 6447 6447 "TARGET_64BIT" 6448 6448 "* 6449 6449 { 6450 int x =INTVAL (operands[1]);6450 unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); 6451 6451 operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); 6452 6452 operands[1] = GEN_INT ((x & 0x1f) - 0x20); 6453 6453 return \"depdi,z %1,%%sar,%2,%0\"; … … 6465 6465 "TARGET_64BIT && exact_log2 (INTVAL (operands[1]) + 1) > 0" 6466 6466 "* 6467 6467 { 6468 intx = INTVAL (operands[1]);6468 HOST_WIDE_INT x = INTVAL (operands[1]); 6469 6469 operands[2] = GEN_INT (exact_log2 (x + 1)); 6470 6470 return \"depdi -1,%%sar,%2,%0\"; 6471 6471 }" … … 6482 6482 "TARGET_64BIT && INTVAL (operands[1]) == -2" 6483 6483 "* 6484 6484 { 6485 intx = INTVAL (operands[1]);6485 HOST_WIDE_INT x = INTVAL (operands[1]); 6486 6486 operands[2] = GEN_INT (exact_log2 ((~x) + 1)); 6487 6487 return \"depdi 0,%%sar,%2,%0\"; 6488 6488 }" … … 6671 6671 6672 6672 6673 6673 ;; Unconditional and other jump instructions. 6674 6674 6675 ;; Trivial return used when no epilogue is needed. 6676 (define_insn "return" 6677 [(return) 6678 (use (reg:SI 2))] 6679 "pa_can_use_return_insn ()" 6680 "* 6681 { 6682 if (TARGET_PA_20) 6683 return \"bve%* (%%r2)\"; 6684 return \"bv%* %%r0(%%r2)\"; 6685 }" 6686 [(set_attr "type" "branch") 6687 (set_attr "length" "4")]) 6688 6675 6689 ;; This is used for most returns. 6676 6690 (define_insn "return_internal" -
gcc/config/pa/predicates.md
[(return) @@ -6719,11 +6733,8 @@ rtx x; /* Try to use the trivial return first. Else use the full epilogue. */ - if (reload_completed - && !frame_pointer_needed - && !df_regs_ever_live_p (2) - && (compute_frame_size (get_frame_size (), 0) ? 0 : 1)) - x = gen_return_internal (); + if (pa_can_use_return_insn ()) + x = gen_return (); else { hppa_expand_epilogue (); diff -Naur gcc-4.6.3.orig/gcc/config/pa/predicates.md gcc-4.6.3/gcc/config/pa/predicates.md
old new 421 421 (ior (match_operand 0 "register_operand") 422 422 (match_operand 0 "cint_ior_operand"))) 423 423 424 ;; True iff OP is a CONST_INT of the forms 0...0xxxx or425 ;; 0...01...1xxxx. Such values can be the left hand side x in (x <<426 ;; r),using the zvdepi instruction.424 ;; True iff OP is a CONST_INT of the forms 0...0xxxx, 0...01...1xxxx, 425 ;; or 1...1xxxx. Such values can be the left hand side x in (x << r), 426 ;; using the zvdepi instruction. 427 427 428 428 (define_predicate "lhs_lshift_cint_operand" 429 429 (match_code "const_int") -
gcc/config/rs6000/altivec.md
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/altivec.md gcc-4.6.3/gcc/config/rs6000/altivec.md
old new 2394 2394 2395 2395 (define_insn "altivec_stvlx" 2396 2396 [(parallel 2397 [(set (match_operand:V 4SI 0 "memory_operand" "=Z")2398 (match_operand:V 4SI 1 "register_operand" "v"))2397 [(set (match_operand:V16QI 0 "memory_operand" "=Z") 2398 (match_operand:V16QI 1 "register_operand" "v")) 2399 2399 (unspec [(const_int 0)] UNSPEC_STVLX)])] 2400 2400 "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" 2401 2401 "stvlx %1,%y0" … … 2403 2403 2404 2404 (define_insn "altivec_stvlxl" 2405 2405 [(parallel 2406 [(set (match_operand:V 4SI 0 "memory_operand" "=Z")2407 (match_operand:V 4SI 1 "register_operand" "v"))2406 [(set (match_operand:V16QI 0 "memory_operand" "=Z") 2407 (match_operand:V16QI 1 "register_operand" "v")) 2408 2408 (unspec [(const_int 0)] UNSPEC_STVLXL)])] 2409 2409 "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" 2410 2410 "stvlxl %1,%y0" … … 2412 2412 2413 2413 (define_insn "altivec_stvrx" 2414 2414 [(parallel 2415 [(set (match_operand:V 4SI 0 "memory_operand" "=Z")2416 (match_operand:V 4SI 1 "register_operand" "v"))2415 [(set (match_operand:V16QI 0 "memory_operand" "=Z") 2416 (match_operand:V16QI 1 "register_operand" "v")) 2417 2417 (unspec [(const_int 0)] UNSPEC_STVRX)])] 2418 2418 "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" 2419 2419 "stvrx %1,%y0" … … 2421 2421 2422 2422 (define_insn "altivec_stvrxl" 2423 2423 [(parallel 2424 [(set (match_operand:V 4SI 0 "memory_operand" "=Z")2425 (match_operand:V 4SI 1 "register_operand" "v"))2424 [(set (match_operand:V16QI 0 "memory_operand" "=Z") 2425 (match_operand:V16QI 1 "register_operand" "v")) 2426 2426 (unspec [(const_int 0)] UNSPEC_STVRXL)])] 2427 2427 "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" 2428 2428 "stvrxl %1,%y0" -
gcc/config/rs6000/rs6000.c
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/rs6000.c gcc-4.6.3/gcc/config/rs6000/rs6000.c
old new 3695 3695 case vec_to_scalar: 3696 3696 case scalar_to_vec: 3697 3697 case cond_branch_not_taken: 3698 case vec_perm:3699 3698 return 1; 3700 3699 3701 3700 case cond_branch_taken: 3702 3701 return 3; 3703 3702 3703 case vec_perm: 3704 if (TARGET_VSX) 3705 return 4; 3706 else 3707 return 1; 3708 3709 case vec_promote_demote: 3710 if (TARGET_VSX) 3711 return 5; 3712 else 3713 return 1; 3714 3704 3715 case unaligned_load: 3705 3716 if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN) 3706 3717 { … … 15811 15822 print_operand (FILE *file, rtx x, int code) 15812 15823 { 15813 15824 int i; 15814 HOST_WIDE_INT val;15815 15825 unsigned HOST_WIDE_INT uval; 15816 15826 15817 15827 switch (code) … … 16252 16262 16253 16263 case 'W': 16254 16264 /* MB value for a PowerPC64 rldic operand. */ 16255 val = (GET_CODE (x) == CONST_INT 16256 ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); 16257 16258 if (val < 0) 16259 i = -1; 16260 else 16261 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) 16262 if ((val <<= 1) < 0) 16263 break; 16265 i = clz_hwi (GET_CODE (x) == CONST_INT 16266 ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); 16264 16267 16265 16268 #if HOST_BITS_PER_WIDE_INT == 32 16266 if (GET_CODE (x) == CONST_INT && i > =0)16269 if (GET_CODE (x) == CONST_INT && i > 0) 16267 16270 i += 32; /* zero-extend high-part was all 0's */ 16268 16271 else if (GET_CODE (x) == CONST_DOUBLE && i == 32) 16269 { 16270 val = CONST_DOUBLE_LOW (x); 16271 16272 gcc_assert (val); 16273 if (val < 0) 16274 --i; 16275 else 16276 for ( ; i < 64; i++) 16277 if ((val <<= 1) < 0) 16278 break; 16279 } 16272 i = clz_hwi (CONST_DOUBLE_LOW (x)) + 32; 16280 16273 #endif 16281 16274 16282 fprintf (file, "%d", i + 1);16275 fprintf (file, "%d", i); 16283 16276 return; 16284 16277 16285 16278 case 'x': … … 17229 17222 case EQ: 17230 17223 case GT: 17231 17224 case GTU: 17225 case ORDERED: 17226 case UNORDERED: 17227 case UNEQ: 17228 case LTGT: 17232 17229 mask = gen_reg_rtx (mode); 17233 17230 emit_insn (gen_rtx_SET (VOIDmode, 17234 17231 mask, -
gcc/config/rs6000/rs6000.h
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/rs6000.h gcc-4.6.3/gcc/config/rs6000/rs6000.h
old new 469 469 /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only. 470 470 Enable 32-bit fcfid's on any of the switches for newer ISA machines or 471 471 XILINX. */ 472 #define TARGET_FCFID (TARGET_POWERPC64 \ 473 || TARGET_POPCNTB /* ISA 2.02 */ \ 474 || TARGET_CMPB /* ISA 2.05 */ \ 475 || TARGET_POPCNTD /* ISA 2.06 */ \ 472 #define TARGET_FCFID (TARGET_POWERPC64 \ 473 || TARGET_PPC_GPOPT /* 970/power4 */ \ 474 || TARGET_POPCNTB /* ISA 2.02 */ \ 475 || TARGET_CMPB /* ISA 2.05 */ \ 476 || TARGET_POPCNTD /* ISA 2.06 */ \ 476 477 || TARGET_XILINX_FPU) 477 478 478 479 #define TARGET_FCTIDZ TARGET_FCFID -
gcc/config/rs6000/rs6000.md
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/rs6000.md gcc-4.6.3/gcc/config/rs6000/rs6000.md
old new 2524 2524 if (GET_CODE (addr1) == PLUS) 2525 2525 { 2526 2526 emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); 2527 addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); 2527 if (TARGET_AVOID_XFORM) 2528 { 2529 emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); 2530 addr2 = op2; 2531 } 2532 else 2533 addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); 2534 } 2535 else if (TARGET_AVOID_XFORM) 2536 { 2537 emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); 2538 addr2 = op2; 2528 2539 } 2529 2540 else 2530 2541 { … … 2574 2585 if (GET_CODE (addr1) == PLUS) 2575 2586 { 2576 2587 emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); 2577 addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); 2588 if (TARGET_AVOID_XFORM) 2589 { 2590 emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); 2591 addr2 = op2; 2592 } 2593 else 2594 addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); 2595 } 2596 else if (TARGET_AVOID_XFORM) 2597 { 2598 emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); 2599 addr2 = op2; 2578 2600 } 2579 2601 else 2580 2602 { … … 2655 2677 if (GET_CODE (addr1) == PLUS) 2656 2678 { 2657 2679 emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); 2658 addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); 2680 if (TARGET_AVOID_XFORM) 2681 { 2682 emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); 2683 addr2 = op2; 2684 } 2685 else 2686 addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); 2687 } 2688 else if (TARGET_AVOID_XFORM) 2689 { 2690 emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); 2691 addr2 = op2; 2659 2692 } 2660 2693 else 2661 2694 { … … 2700 2733 if (GET_CODE (addr1) == PLUS) 2701 2734 { 2702 2735 emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); 2703 addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); 2736 if (TARGET_AVOID_XFORM) 2737 { 2738 emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); 2739 addr2 = op2; 2740 } 2741 else 2742 addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); 2743 } 2744 else if (TARGET_AVOID_XFORM) 2745 { 2746 emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); 2747 addr2 = op2; 2704 2748 } 2705 2749 else 2706 2750 { -
gcc/config/rs6000/vector.md
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/vector.md gcc-4.6.3/gcc/config/rs6000/vector.md
old new 448 448 "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)" 449 449 "") 450 450 451 (define_insn_and_split "*vector_uneq<mode>" 452 [(set (match_operand:VEC_F 0 "vfloat_operand" "") 453 (uneq:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") 454 (match_operand:VEC_F 2 "vfloat_operand" "")))] 455 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" 456 "#" 457 "" 458 [(set (match_dup 3) 459 (gt:VEC_F (match_dup 1) 460 (match_dup 2))) 461 (set (match_dup 4) 462 (gt:VEC_F (match_dup 2) 463 (match_dup 1))) 464 (set (match_dup 0) 465 (not:VEC_F (ior:VEC_F (match_dup 3) 466 (match_dup 4))))] 467 " 468 { 469 operands[3] = gen_reg_rtx (<MODE>mode); 470 operands[4] = gen_reg_rtx (<MODE>mode); 471 }") 472 473 (define_insn_and_split "*vector_ltgt<mode>" 474 [(set (match_operand:VEC_F 0 "vfloat_operand" "") 475 (ltgt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") 476 (match_operand:VEC_F 2 "vfloat_operand" "")))] 477 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" 478 "#" 479 "" 480 [(set (match_dup 3) 481 (gt:VEC_F (match_dup 1) 482 (match_dup 2))) 483 (set (match_dup 4) 484 (gt:VEC_F (match_dup 2) 485 (match_dup 1))) 486 (set (match_dup 0) 487 (ior:VEC_F (match_dup 3) 488 (match_dup 4)))] 489 " 490 { 491 operands[3] = gen_reg_rtx (<MODE>mode); 492 operands[4] = gen_reg_rtx (<MODE>mode); 493 }") 494 495 (define_insn_and_split "*vector_ordered<mode>" 496 [(set (match_operand:VEC_F 0 "vfloat_operand" "") 497 (ordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") 498 (match_operand:VEC_F 2 "vfloat_operand" "")))] 499 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" 500 "#" 501 "" 502 [(set (match_dup 3) 503 (ge:VEC_F (match_dup 1) 504 (match_dup 2))) 505 (set (match_dup 4) 506 (ge:VEC_F (match_dup 2) 507 (match_dup 1))) 508 (set (match_dup 0) 509 (ior:VEC_F (match_dup 3) 510 (match_dup 4)))] 511 " 512 { 513 operands[3] = gen_reg_rtx (<MODE>mode); 514 operands[4] = gen_reg_rtx (<MODE>mode); 515 }") 516 517 (define_insn_and_split "*vector_unordered<mode>" 518 [(set (match_operand:VEC_F 0 "vfloat_operand" "") 519 (unordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") 520 (match_operand:VEC_F 2 "vfloat_operand" "")))] 521 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" 522 "#" 523 "" 524 [(set (match_dup 3) 525 (ge:VEC_F (match_dup 1) 526 (match_dup 2))) 527 (set (match_dup 4) 528 (ge:VEC_F (match_dup 2) 529 (match_dup 1))) 530 (set (match_dup 0) 531 (not:VEC_F (ior:VEC_F (match_dup 3) 532 (match_dup 4))))] 533 " 534 { 535 operands[3] = gen_reg_rtx (<MODE>mode); 536 operands[4] = gen_reg_rtx (<MODE>mode); 537 }") 538 451 539 ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask 452 540 ;; which is in the reverse order that we want 453 541 (define_expand "vector_select_<mode>" -
gcc/config/rs6000/vsx.md
diff -Naur gcc-4.6.3.orig/gcc/config/rs6000/vsx.md gcc-4.6.3/gcc/config/rs6000/vsx.md
old new 1006 1006 "VECTOR_MEM_VSX_P (<MODE>mode)" 1007 1007 { 1008 1008 if (INTVAL (operands[3]) == 0) 1009 return \"xxpermdi %x0,%x 1,%x2,1\";1009 return \"xxpermdi %x0,%x2,%x1,1\"; 1010 1010 else if (INTVAL (operands[3]) == 1) 1011 return \"xxpermdi %x0,%x 2,%x1,0\";1011 return \"xxpermdi %x0,%x1,%x2,0\"; 1012 1012 else 1013 1013 gcc_unreachable (); 1014 1014 } -
gcc/config/rx/rx.c
diff -Naur gcc-4.6.3.orig/gcc/config/rx/rx.c gcc-4.6.3/gcc/config/rx/rx.c
old new 2348 2348 rx_option_override (void) 2349 2349 { 2350 2350 /* This target defaults to strict volatile bitfields. */ 2351 if (flag_strict_volatile_bitfields < 0 )2351 if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) 2352 2352 flag_strict_volatile_bitfields = 1; 2353 2353 2354 2354 rx_override_options_after_change (); -
gcc/config/sh/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/sh/linux-unwind.h gcc-4.6.3/gcc/config/sh/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for SH Linux. 2 Copyright (C) 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. 2 Copyright (C) 2004, 2005, 2006, 2007, 2009, 2012 Free Software Foundation, 3 Inc. 3 4 4 5 This file is part of GCC. 5 6 … … 80 81 && (*(unsigned long *) (pc+11) == 0x6ff0fff0)) 81 82 { 82 83 struct rt_sigframe { 83 s truct siginfo*pinfo;84 siginfo_t *pinfo; 84 85 void *puc; 85 s truct siginfoinfo;86 siginfo_t info; 86 87 struct ucontext uc; 87 88 } *rt_ = context->cfa; 88 89 /* The void * cast is necessary to avoid an aliasing warning. … … 179 180 && (*(unsigned short *) (pc+14) == 0x00ad)))) 180 181 { 181 182 struct rt_sigframe { 182 s truct siginfoinfo;183 siginfo_t info; 183 184 struct ucontext uc; 184 185 } *rt_ = context->cfa; 185 186 /* The void * cast is necessary to avoid an aliasing warning. -
gcc/config/sh/sh.c
diff -Naur gcc-4.6.3.orig/gcc/config/sh/sh.c gcc-4.6.3/gcc/config/sh/sh.c
old new 763 763 SUBTARGET_OVERRIDE_OPTIONS; 764 764 if (optimize > 1 && !optimize_size) 765 765 target_flags |= MASK_SAVE_ALL_TARGET_REGS; 766 if (flag_finite_math_only == 2)767 flag_finite_math_only768 = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE;769 if (TARGET_SH2E && !flag_finite_math_only)770 target_flags |= MASK_IEEE;771 766 sh_cpu = PROCESSOR_SH1; 772 767 assembler_dialect = 0; 773 768 if (TARGET_SH2) … … 911 906 if (! VALID_REGISTER_P (ADDREGNAMES_REGNO (regno))) 912 907 sh_additional_register_names[regno][0] = '\0'; 913 908 914 flag_omit_frame_pointer = (PREFERRED_DEBUGGING_TYPE == DWARF2_DEBUG);915 916 909 if ((flag_pic && ! TARGET_PREFERGOT) 917 910 || (TARGET_SHMEDIA && !TARGET_PT_FIXED)) 918 911 flag_no_function_cse = 1; … … 944 937 flag_schedule_insns = 0; 945 938 } 946 939 947 if ((target_flags_explicit & MASK_ACCUMULATE_OUTGOING_ARGS) == 0)948 target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;949 950 940 /* Unwind info is not correct around the CFG unless either a frame 951 941 pointer is present or M_A_O_A is set. Fixing this requires rewriting 952 942 unwind info generation to be aware of the CFG and propagating states 953 943 around edges. */ 954 944 if ((flag_unwind_tables || flag_asynchronous_unwind_tables 955 945 || flag_exceptions || flag_non_call_exceptions) 956 && flag_omit_frame_pointer 957 && !(target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)) 946 && flag_omit_frame_pointer && !TARGET_ACCUMULATE_OUTGOING_ARGS) 958 947 { 959 if (target_flags_explicit & MASK_ACCUMULATE_OUTGOING_ARGS)960 948 warning (0, "unwind tables currently require either a frame pointer " 961 949 "or -maccumulate-outgoing-args for correctness"); 962 target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;950 TARGET_ACCUMULATE_OUTGOING_ARGS = 1; 963 951 } 964 952 965 953 /* Unwinding with -freorder-blocks-and-partition does not work on this … … 1014 1002 align_functions = min_align; 1015 1003 } 1016 1004 1005 /* If the -mieee option was not explicitly set by the user, turn it on 1006 unless -ffinite-math-only was specified. See also PR 33135. */ 1007 if (! global_options_set.x_TARGET_IEEE) 1008 TARGET_IEEE = ! flag_finite_math_only; 1009 1017 1010 if (sh_fixed_range_str) 1018 1011 sh_fix_range (sh_fixed_range_str); 1019 1012 1020 1013 /* This target defaults to strict volatile bitfields. */ 1021 if (flag_strict_volatile_bitfields < 0 )1014 if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) 1022 1015 flag_strict_volatile_bitfields = 1; 1023 1016 } 1024 1017 -
gcc/config/sh/sh.opt
diff -Naur gcc-4.6.3.orig/gcc/config/sh/sh.opt gcc-4.6.3/gcc/config/sh/sh.opt
old new 202 202 Generate FPU-less SHcompact code 203 203 204 204 maccumulate-outgoing-args 205 Target Report Mask(ACCUMULATE_OUTGOING_ARGS)205 Target Report Var(TARGET_ACCUMULATE_OUTGOING_ARGS) Init(1) 206 206 Reserve space for outgoing arguments in the function prologue 207 207 208 208 madjust-unroll … … 270 270 Follow Renesas (formerly Hitachi) / SuperH calling conventions 271 271 272 272 mieee 273 Target Report Mask(IEEE)274 Increase the IEEE compliance for floating-point co de273 Target Var(TARGET_IEEE) 274 Increase the IEEE compliance for floating-point comparisons 275 275 276 276 mindexed-addressing 277 277 Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA) -
gcc/config/sol2.h
diff -Naur gcc-4.6.3.orig/gcc/config/sol2.h gcc-4.6.3/gcc/config/sol2.h
old new 1 1 /* Operating system specific defines to be used when targeting GCC for any 2 2 Solaris 2 system. 3 Copyright 2002, 2003, 2004, 2007, 2008, 2009, 2010, 2011 3 Copyright 2002, 2003, 2004, 2007, 2008, 2009, 2010, 2011, 2012 4 4 Free Software Foundation, Inc. 5 5 6 6 This file is part of GCC. … … 163 163 %{YP,*} \ 164 164 %{R*} \ 165 165 %{compat-bsd: \ 166 %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib } \167 %{!p:%{!pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib:%R/usr/lib }}} \166 %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib:%R/lib} \ 167 %{!p:%{!pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib:%R/usr/lib:%R/lib}}} \ 168 168 -R %R/usr/ucblib} \ 169 169 %{!compat-bsd: \ 170 %{!YP,*:%{p|pg:-Y P,%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib } \171 %{!p:%{!pg:-Y P,%R/usr/ccs/lib:%R/usr/lib }}}}"170 %{!YP,*:%{p|pg:-Y P,%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib:%R/lib} \ 171 %{!p:%{!pg:-Y P,%R/usr/ccs/lib:%R/usr/lib:%R/lib}}}}" 172 172 173 173 #undef LINK_ARCH32_SPEC 174 174 #define LINK_ARCH32_SPEC LINK_ARCH32_SPEC_BASE -
gcc/config/sparc/sol2-bi.h
diff -Naur gcc-4.6.3.orig/gcc/config/sparc/sol2-bi.h gcc-4.6.3/gcc/config/sparc/sol2-bi.h
old new 1 1 /* Definitions of target machine for GCC, for bi-arch SPARC 2 2 running Solaris 2 using the system assembler and linker. 3 Copyright (C) 2002, 2003, 2004, 2006, 2007, 2009, 2010, 2011 3 Copyright (C) 2002, 2003, 2004, 2006, 2007, 2009, 2010, 2011, 2012 4 4 Free Software Foundation, Inc. 5 5 6 6 This file is part of GCC. … … 191 191 %{YP,*} \ 192 192 %{R*} \ 193 193 %{compat-bsd: \ 194 %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9 } \195 %{!p:%{!pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/sparcv9 }}} \194 %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9:%R/lib/sparcv9} \ 195 %{!p:%{!pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/sparcv9:%R/lib/sparcv9}}} \ 196 196 -R %R/usr/ucblib/sparcv9} \ 197 197 %{!compat-bsd: \ 198 %{!YP,*:%{p|pg:-Y P,%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9 } \199 %{!p:%{!pg:-Y P,%R/usr/lib/sparcv9 }}}}"198 %{!YP,*:%{p|pg:-Y P,%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9:%R/lib/sparcv9} \ 199 %{!p:%{!pg:-Y P,%R/usr/lib/sparcv9:%R/lib/sparcv9}}}}" 200 200 201 201 #define LINK_ARCH64_SPEC LINK_ARCH64_SPEC_BASE 202 202 -
gcc/config/sparc/sparc.c
diff -Naur gcc-4.6.3.orig/gcc/config/sparc/sparc.c gcc-4.6.3/gcc/config/sparc/sparc.c
old new 3658 3658 { 3659 3659 x = delegitimize_mem_from_attrs (x); 3660 3660 3661 if (GET_CODE (x) == LO_SUM 3662 && GET_CODE (XEXP (x, 1)) == UNSPEC 3663 && XINT (XEXP (x, 1), 1) == UNSPEC_TLSLE) 3664 { 3665 x = XVECEXP (XEXP (x, 1), 0, 0); 3666 gcc_assert (GET_CODE (x) == SYMBOL_REF); 3667 } 3661 if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 1)) == UNSPEC) 3662 switch (XINT (XEXP (x, 1), 1)) 3663 { 3664 case UNSPEC_MOVE_PIC: 3665 case UNSPEC_TLSLE: 3666 x = XVECEXP (XEXP (x, 1), 0, 0); 3667 gcc_assert (GET_CODE (x) == SYMBOL_REF); 3668 break; 3669 default: 3670 break; 3671 } 3668 3672 3669 3673 return x; 3670 3674 } … … 9634 9638 void_list_node)); 9635 9639 DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL, 9636 9640 NULL_TREE, void_type_node); 9641 TREE_PUBLIC (decl) = 1; 9637 9642 TREE_STATIC (decl) = 1; 9638 9643 make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl)); 9639 9644 DECL_VISIBILITY (decl) = VISIBILITY_HIDDEN; -
gcc/config/spu/spu.c
diff -Naur gcc-4.6.3.orig/gcc/config/spu/spu.c gcc-4.6.3/gcc/config/spu/spu.c
old new 6794 6794 case scalar_to_vec: 6795 6795 case cond_branch_not_taken: 6796 6796 case vec_perm: 6797 case vec_promote_demote: 6797 6798 return 1; 6798 6799 6799 6800 case scalar_store: -
gcc/config/xtensa/linux-unwind.h
diff -Naur gcc-4.6.3.orig/gcc/config/xtensa/linux-unwind.h gcc-4.6.3/gcc/config/xtensa/linux-unwind.h
old new 1 1 /* DWARF2 EH unwinding support for Xtensa. 2 Copyright (C) 2008, 2009 Free Software Foundation, Inc.2 Copyright (C) 2008, 2009, 2012 Free Software Foundation, Inc. 3 3 4 4 This file is part of GCC. 5 5 … … 62 62 struct sigcontext *sc; 63 63 64 64 struct rt_sigframe { 65 s truct siginfoinfo;65 siginfo_t info; 66 66 struct ucontext uc; 67 67 } *rt_; 68 68 -
gcc/config.gcc
diff -Naur gcc-4.6.3.orig/gcc/config.gcc gcc-4.6.3/gcc/config.gcc
old new 817 817 arm*-*-linux*) # ARM GNU/Linux with ELF 818 818 tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h" 819 819 case $target in 820 arm*b-* )820 arm*b-*-linux*) 821 821 tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" 822 822 ;; 823 823 esac … … 925 925 extra_objs="avr-devices.o" 926 926 ;; 927 927 avr-*-*) 928 tm_file="avr/avr.h dbxelf.h newlib-stdint.h"928 tm_file="avr/avr.h dbxelf.h avr/avr-stdint.h" 929 929 use_gcc_stdint=wrap 930 930 extra_gcc_objs="driver-avr.o avr-devices.o" 931 931 extra_objs="avr-devices.o" -
gcc/configure
diff -Naur gcc-4.6.3.orig/gcc/configure gcc-4.6.3/gcc/configure
old new 4842 4842 { $as_echo "$as_me:${as_lineno-$LINENO}: result: $acx_cv_cc_gcc_supports_ada" >&5 4843 4843 $as_echo "$acx_cv_cc_gcc_supports_ada" >&6; } 4844 4844 4845 if test x$GNATBIND != xno && test x$GNATMAKE!= xno && test x$acx_cv_cc_gcc_supports_ada != xno; then4845 if test "x$GNATBIND" != xno && test "x$GNATMAKE" != xno && test x$acx_cv_cc_gcc_supports_ada != xno; then 4846 4846 have_gnat=yes 4847 4847 else 4848 4848 have_gnat=no -
gcc/convert.c
diff -Naur gcc-4.6.3.orig/gcc/convert.c gcc-4.6.3/gcc/convert.c
old new 44 44 if (TREE_TYPE (expr) == type) 45 45 return expr; 46 46 47 /* Propagate overflow to the NULL pointer. */48 if (integer_zerop (expr))49 return force_fit_type_double (type, double_int_zero, 0,50 TREE_OVERFLOW (expr));51 52 47 switch (TREE_CODE (TREE_TYPE (expr))) 53 48 { 54 49 case POINTER_TYPE: -
gcc/cp/decl.c
diff -Naur gcc-4.6.3.orig/gcc/cp/decl.c gcc-4.6.3/gcc/cp/decl.c
old new 3636 3636 TYPE_SIZE_UNIT (nullptr_type_node) = size_int (GET_MODE_SIZE (ptr_mode)); 3637 3637 TYPE_UNSIGNED (nullptr_type_node) = 1; 3638 3638 TYPE_PRECISION (nullptr_type_node) = GET_MODE_BITSIZE (ptr_mode); 3639 SET_TYPE_MODE (nullptr_type_node, Pmode);3639 SET_TYPE_MODE (nullptr_type_node, ptr_mode); 3640 3640 record_builtin_type (RID_MAX, "decltype(nullptr)", nullptr_type_node); 3641 3641 nullptr_node = build_int_cst (nullptr_type_node, 0); 3642 3642 } -
gcc/cp/pt.c
diff -Naur gcc-4.6.3.orig/gcc/cp/pt.c gcc-4.6.3/gcc/cp/pt.c
old new 17785 17785 } 17786 17786 else 17787 17787 { 17788 tree tmp; 17788 17789 decl = tsubst_copy (TREE_PURPOSE (t), argvec, 17789 17790 tf_warning_or_error, NULL_TREE); 17790 17791 … … 17793 17794 in_base_initializer = 1; 17794 17795 17795 17796 init = TREE_VALUE (t); 17797 tmp = init; 17796 17798 if (init != void_type_node) 17797 17799 init = tsubst_expr (init, argvec, 17798 17800 tf_warning_or_error, NULL_TREE, 17799 17801 /*integral_constant_expression_p=*/false); 17802 if (init == NULL_TREE && tmp != NULL_TREE) 17803 /* If we had an initializer but it instantiated to nothing, 17804 value-initialize the object. This will only occur when 17805 the initializer was a pack expansion where the parameter 17806 packs used in that expansion were of length zero. */ 17807 init = void_type_node; 17800 17808 in_base_initializer = 0; 17801 17809 } 17802 17810 -
gcc/cp/semantics.c
diff -Naur gcc-4.6.3.orig/gcc/cp/semantics.c gcc-4.6.3/gcc/cp/semantics.c
old new 6763 6763 6764 6764 STRIP_NOPS (sub); 6765 6765 subtype = TREE_TYPE (sub); 6766 gcc_assert (POINTER_TYPE_P (subtype));6767 6766 6768 6767 if (TREE_CODE (sub) == ADDR_EXPR) 6769 6768 { -
gcc/cp/typeck.c
diff -Naur gcc-4.6.3.orig/gcc/cp/typeck.c gcc-4.6.3/gcc/cp/typeck.c
old new 1822 1822 if (error_operand_p (exp)) 1823 1823 return error_mark_node; 1824 1824 1825 if (NULLPTR_TYPE_P (type) )1825 if (NULLPTR_TYPE_P (type) && !TREE_SIDE_EFFECTS (exp)) 1826 1826 return nullptr_node; 1827 1827 1828 1828 /* build_c_cast puts on a NOP_EXPR to make the result not an lvalue. -
gcc/df-problems.c
diff -Naur gcc-4.6.3.orig/gcc/df-problems.c gcc-4.6.3/gcc/df-problems.c
old new 3956 3956 df_simulate_initialize_backwards (merge_bb, test_use); 3957 3957 for (insn = across_to; ; insn = next) 3958 3958 { 3959 if (CALL_P (insn)) 3960 { 3961 if (RTL_CONST_OR_PURE_CALL_P (insn)) 3962 /* Pure functions can read from memory. Const functions can 3963 read from arguments that the ABI has forced onto the stack. 3964 Neither sort of read can be volatile. */ 3965 memrefs_in_across |= MEMREF_NORMAL; 3966 else 3967 { 3968 memrefs_in_across |= MEMREF_VOLATILE; 3969 mem_sets_in_across |= MEMREF_VOLATILE; 3970 } 3971 } 3959 3972 if (NONDEBUG_INSN_P (insn)) 3960 3973 { 3961 3974 df_simulate_find_defs (insn, test_set); -
gcc/doc/install.texi
diff -Naur gcc-4.6.3.orig/gcc/doc/install.texi gcc-4.6.3/gcc/doc/install.texi
old new 1208 1208 1209 1209 @item --with-llsc 1210 1210 On MIPS targets, make @option{-mllsc} the default when no 1211 @option{-mno-l sc} option is passed. This is the default for1211 @option{-mno-llsc} option is passed. This is the default for 1212 1212 Linux-based targets, as the kernel will emulate them if the ISA does 1213 1213 not provide them. 1214 1214 -
gcc/doc/invoke.texi
diff -Naur gcc-4.6.3.orig/gcc/doc/invoke.texi gcc-4.6.3/gcc/doc/invoke.texi
old new 853 853 -m5-compact -m5-compact-nofpu @gol 854 854 -mb -ml -mdalign -mrelax @gol 855 855 -mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol 856 -mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace@gol857 -m prefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol856 -mieee -mno-ieee -mbitops -misize -minline-ic_invalidate -mpadstruct @gol 857 -mspace -mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol 858 858 -mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol 859 859 -madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol 860 860 -maccumulate-outgoing-args -minvalid-symbols} … … 16938 16938 @option{-mhitachi} is given. 16939 16939 16940 16940 @item -mieee 16941 @item -mno-ieee 16941 16942 @opindex mieee 16942 Increase IEEE-compliance of floating-point code. 16943 At the moment, this is equivalent to @option{-fno-finite-math-only}. 16944 When generating 16 bit SH opcodes, getting IEEE-conforming results for 16945 comparisons of NANs / infinities incurs extra overhead in every 16946 floating point comparison, therefore the default is set to 16947 @option{-ffinite-math-only}. 16943 @opindex mnoieee 16944 Control the IEEE compliance of floating-point comparisons, which affects the 16945 handling of cases where the result of a comparison is unordered. By default 16946 @option{-mieee} is implicitly enabled. If @option{-ffinite-math-only} is 16947 enabled @option{-mno-ieee} is implicitly set, which results in faster 16948 floating-point greater-equal and less-equal comparisons. The implcit settings 16949 can be overridden by specifying either @option{-mieee} or @option{-mno-ieee}. 16948 16950 16949 16951 @item -minline-ic_invalidate 16950 16952 @opindex minline-ic_invalidate -
gcc/doc/tm.texi
diff -Naur gcc-4.6.3.orig/gcc/doc/tm.texi gcc-4.6.3/gcc/doc/tm.texi
old new 1118 1118 If the value of this macro has a type, it should be an unsigned type. 1119 1119 @end defmac 1120 1120 1121 @deftypefn {Target Hook} HOST_WIDE_INT TARGET_VECTOR_ALIGNMENT (const_tree @var{type}) 1122 This hook can be used to define the alignment for a vector of type 1123 @var{type}, in order to comply with a platform ABI. The default is to 1124 require natural alignment for vector types. The alignment returned by 1125 this hook must be a power-of-two multiple of the default alignment of 1126 the vector element type. 1127 @end deftypefn 1128 1121 1129 @defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align}) 1122 1130 If defined, a C expression to compute the alignment for stack slot. 1123 1131 @var{type} is the data type, @var{mode} is the widest mode available, -
gcc/doc/tm.texi.in
diff -Naur gcc-4.6.3.orig/gcc/doc/tm.texi.in gcc-4.6.3/gcc/doc/tm.texi.in
old new 1108 1108 If the value of this macro has a type, it should be an unsigned type. 1109 1109 @end defmac 1110 1110 1111 @hook TARGET_VECTOR_ALIGNMENT 1112 1111 1113 @defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align}) 1112 1114 If defined, a C expression to compute the alignment for stack slot. 1113 1115 @var{type} is the data type, @var{mode} is the widest mode available, -
gcc/expr.c
diff -Naur gcc-4.6.3.orig/gcc/expr.c gcc-4.6.3/gcc/expr.c
old new 5971 5971 || bitpos % GET_MODE_ALIGNMENT (mode)) 5972 5972 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))) 5973 5973 || (bitpos % BITS_PER_UNIT != 0))) 5974 || (bitsize >= 0 && mode != BLKmode 5975 && GET_MODE_BITSIZE (mode) > bitsize) 5974 5976 /* If the RHS and field are a constant size and the size of the 5975 5977 RHS isn't the same size as the bitfield, we must use bitfield 5976 5978 operations. */ … … 9182 9184 orig_op0 = op0 9183 9185 = expand_expr (tem, 9184 9186 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE 9187 && COMPLETE_TYPE_P (TREE_TYPE (tem)) 9185 9188 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) 9186 9189 != INTEGER_CST) 9187 9190 && modifier != EXPAND_STACK_PARM -
gcc/fortran/decl.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/decl.c gcc-4.6.3/gcc/fortran/decl.c
old new 3623 3623 } 3624 3624 } 3625 3625 3626 /* Module variables implicitly have the SAVE attribute. */ 3627 if (gfc_current_state () == COMP_MODULE && !current_attr.save) 3626 /* Since Fortran 2008 module variables implicitly have the SAVE attribute. */ 3627 if (gfc_current_state () == COMP_MODULE && !current_attr.save 3628 && (gfc_option.allow_std & GFC_STD_F2008) != 0) 3628 3629 current_attr.save = SAVE_IMPLICIT; 3629 3630 3630 3631 colon_seen = 1; -
gcc/fortran/expr.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/expr.c gcc-4.6.3/gcc/fortran/expr.c
old new 4474 4474 if (ptr_component && ref->type == REF_COMPONENT) 4475 4475 check_intentin = false; 4476 4476 if (ref->type == REF_COMPONENT && ref->u.c.component->attr.pointer) 4477 ptr_component = true; 4477 { 4478 ptr_component = true; 4479 if (!pointer) 4480 check_intentin = false; 4481 } 4478 4482 } 4479 4483 if (check_intentin && sym->attr.intent == INTENT_IN) 4480 4484 { -
gcc/fortran/resolve.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/resolve.c gcc-4.6.3/gcc/fortran/resolve.c
old new 1452 1452 1453 1453 if (sym->intmod_sym_id) 1454 1454 isym = gfc_intrinsic_function_by_id ((gfc_isym_id) sym->intmod_sym_id); 1455 else 1455 else if (!sym->attr.subroutine) 1456 1456 isym = gfc_find_function (sym->name); 1457 1457 1458 1458 if (isym) … … 9700 9700 || sym->attr.data 9701 9701 || sym->module 9702 9702 || sym->attr.cray_pointee 9703 || sym->attr.cray_pointer) 9703 || sym->attr.cray_pointer 9704 || sym->assoc) 9704 9705 return NULL; 9705 9706 9706 9707 /* Now we'll try to build an initializer expression. */ -
gcc/fortran/trans-array.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/trans-array.c gcc-4.6.3/gcc/fortran/trans-array.c
old new 2056 2056 gfc_se se; 2057 2057 int n; 2058 2058 2059 /* Don't evaluate the arguments for realloc_lhs_loop_for_fcn_call; otherwise, 2060 arguments could get evaluated multiple times. */ 2061 if (ss->is_alloc_lhs) 2062 return; 2063 2059 2064 /* TODO: This can generate bad code if there are ordering dependencies, 2060 2065 e.g., a callee allocated function and an unknown size constructor. */ 2061 2066 gcc_assert (ss != NULL); … … 7548 7553 scalar = 1; 7549 7554 for (; arg; arg = arg->next) 7550 7555 { 7551 if (!arg->expr )7556 if (!arg->expr || arg->expr->expr_type == EXPR_NULL) 7552 7557 continue; 7553 7558 7554 7559 newss = gfc_walk_subexpr (head, arg->expr); -
gcc/fortran/trans-types.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/trans-types.c gcc-4.6.3/gcc/fortran/trans-types.c
old new 2519 2519 || sym->attr.flavor == FL_PROGRAM); 2520 2520 2521 2521 if (sym->backend_decl) 2522 return TREE_TYPE (sym->backend_decl); 2522 { 2523 if (sym->attr.proc_pointer) 2524 return TREE_TYPE (TREE_TYPE (sym->backend_decl)); 2525 return TREE_TYPE (sym->backend_decl); 2526 } 2523 2527 2524 2528 alternate_return = 0; 2525 2529 typelist = NULL_TREE; -
gcc/fortran/trans.c
diff -Naur gcc-4.6.3.orig/gcc/fortran/trans.c gcc-4.6.3/gcc/fortran/trans.c
old new 1005 1005 if (!res && size != 0) 1006 1006 _gfortran_os_error ("Allocation would exceed memory limit"); 1007 1007 1008 if (size == 0)1009 return NULL;1010 1011 1008 return res; 1012 1009 } */ 1013 1010 tree 1014 1011 gfc_call_realloc (stmtblock_t * block, tree mem, tree size) 1015 1012 { 1016 tree msg, res, nonzero, zero,null_result, tmp;1013 tree msg, res, nonzero, null_result, tmp; 1017 1014 tree type = TREE_TYPE (mem); 1018 1015 1019 1016 size = gfc_evaluate_now (size, block); … … 1044 1041 build_empty_stmt (input_location)); 1045 1042 gfc_add_expr_to_block (block, tmp); 1046 1043 1047 /* if (size == 0) then the result is NULL. */1048 tmp = fold_build2_loc (input_location, MODIFY_EXPR, type, res,1049 build_int_cst (type, 0));1050 zero = fold_build1_loc (input_location, TRUTH_NOT_EXPR, boolean_type_node,1051 nonzero);1052 tmp = fold_build3_loc (input_location, COND_EXPR, void_type_node, zero, tmp,1053 build_empty_stmt (input_location));1054 gfc_add_expr_to_block (block, tmp);1055 1056 1044 return res; 1057 1045 } 1058 1046 -
gcc/gcov-iov.c
diff -Naur gcc-4.6.3.orig/gcc/gcov-iov.c gcc-4.6.3/gcc/gcov-iov.c
old new 19 19 along with GCC; see the file COPYING3. If not see 20 20 <http://www.gnu.org/licenses/>. */ 21 21 22 #include <stdio.h>23 #include <stdlib.h>22 #include "bconfig.h" 23 #include "system.h" 24 24 25 25 /* Command line arguments are the base GCC version and the development 26 26 phase (the latter may be an empty string). */ … … 48 48 if (*ptr == '.') 49 49 minor = strtoul (ptr + 1, 0, 10); 50 50 51 /* For releases the development phase is an empty string, for 52 prerelease versions on a release branch it is "prerelease". 53 Consider both equal as patch-level releases do not change 54 the GCOV version either. 55 On the trunk the development phase is "experimental". */ 51 56 phase = argv[2][0]; 52 if (phase == '\0') 57 if (phase == '\0' 58 || strcmp (argv[2], "prerelease") == 0) 53 59 phase = '*'; 54 60 55 61 v[0] = (major < 10 ? '0' : 'A' - 10) + major; -
gcc/gimple.c
diff -Naur gcc-4.6.3.orig/gcc/gimple.c gcc-4.6.3/gcc/gimple.c
old new 2275 2275 bool 2276 2276 gimple_has_side_effects (const_gimple s) 2277 2277 { 2278 unsigned i;2279 2280 2278 if (is_gimple_debug (s)) 2281 2279 return false; 2282 2280 … … 2292 2290 2293 2291 if (is_gimple_call (s)) 2294 2292 { 2295 unsigned nargs = gimple_call_num_args (s);2293 int flags = gimple_call_flags (s); 2296 2294 2297 if (!(gimple_call_flags (s) & (ECF_CONST | ECF_PURE))) 2298 return true; 2299 else if (gimple_call_flags (s) & ECF_LOOPING_CONST_OR_PURE) 2300 /* An infinite loop is considered a side effect. */ 2295 /* An infinite loop is considered a side effect. */ 2296 if (!(flags & (ECF_CONST | ECF_PURE)) 2297 || (flags & ECF_LOOPING_CONST_OR_PURE)) 2301 2298 return true; 2302 2299 2303 if (gimple_call_lhs (s)2304 && TREE_SIDE_EFFECTS (gimple_call_lhs (s)))2305 {2306 gcc_checking_assert (gimple_has_volatile_ops (s));2307 return true;2308 }2309 2310 if (TREE_SIDE_EFFECTS (gimple_call_fn (s)))2311 return true;2312 2313 for (i = 0; i < nargs; i++)2314 if (TREE_SIDE_EFFECTS (gimple_call_arg (s, i)))2315 {2316 gcc_checking_assert (gimple_has_volatile_ops (s));2317 return true;2318 }2319 2320 2300 return false; 2321 2301 } 2322 else2323 {2324 for (i = 0; i < gimple_num_ops (s); i++)2325 {2326 tree op = gimple_op (s, i);2327 if (op && TREE_SIDE_EFFECTS (op))2328 {2329 gcc_checking_assert (gimple_has_volatile_ops (s));2330 return true;2331 }2332 }2333 }2334 2302 2335 2303 return false; 2336 2304 } -
gcc/gthr-posix.h
diff -Naur gcc-4.6.3.orig/gcc/gthr-posix.h gcc-4.6.3/gcc/gthr-posix.h
old new 239 239 static inline int 240 240 __gthread_active_p (void) 241 241 { 242 static void *const __gthread_active_ptr243 = __extension__ (void *) &__gthrw_(244 242 /* Android's C library does not provide pthread_cancel, check for 245 243 `pthread_create' instead. */ 246 244 #ifndef __BIONIC__ 247 pthread_cancel 245 static void *const __gthread_active_ptr 246 = __extension__ (void *) &__gthrw_(pthread_cancel); 248 247 #else 249 pthread_create 248 static void *const __gthread_active_ptr 249 = __extension__ (void *) &__gthrw_(pthread_create); 250 250 #endif 251 );252 251 return __gthread_active_ptr != 0; 253 252 } 254 253 -
gcc/ipa-prop.c
diff -Naur gcc-4.6.3.orig/gcc/ipa-prop.c gcc-4.6.3/gcc/ipa-prop.c
old new 704 704 || is_global_var (base)) 705 705 return; 706 706 707 if (detect_type_change (op, base, call, jfunc, offset))708 return;709 710 707 binfo = TYPE_BINFO (TREE_TYPE (base)); 711 if (!binfo) 708 if (!binfo 709 || detect_type_change (op, base, call, jfunc, offset)) 712 710 return; 711 713 712 binfo = get_binfo_at_offset (binfo, offset, TREE_TYPE (op)); 714 713 if (binfo) 715 714 { -
gcc/lto/lto.c
diff -Naur gcc-4.6.3.orig/gcc/lto/lto.c gcc-4.6.3/gcc/lto/lto.c
old new 893 893 894 894 for (node = cgraph_nodes; node; node = node->next) 895 895 { 896 if (!partition_cgraph_node_p (node)) 896 if (!partition_cgraph_node_p (node) 897 || node->aux) 897 898 continue; 898 899 899 900 file_data = node->local.lto_file_data; … … 923 924 npartitions++; 924 925 } 925 926 926 if (!node->aux) 927 add_cgraph_node_to_partition (partition, node); 927 add_cgraph_node_to_partition (partition, node); 928 928 } 929 929 930 930 for (vnode = varpool_nodes; vnode; vnode = vnode->next) 931 931 { 932 if (!partition_varpool_node_p (vnode)) 932 if (!partition_varpool_node_p (vnode) 933 || vnode->aux) 933 934 continue; 934 935 file_data = vnode->lto_file_data; 935 936 slot = pointer_map_contains (pmap, file_data); … … 943 944 npartitions++; 944 945 } 945 946 946 if (!vnode->aux) 947 add_varpool_node_to_partition (partition, vnode); 947 add_varpool_node_to_partition (partition, vnode); 948 948 } 949 949 for (node = cgraph_nodes; node; node = node->next) 950 950 node->aux = NULL; … … 1050 1050 1051 1051 for (i = 0; i < n_nodes; i++) 1052 1052 { 1053 if (!order[i]->aux) 1054 add_cgraph_node_to_partition (partition, order[i]); 1053 if (order[i]->aux) 1054 continue; 1055 add_cgraph_node_to_partition (partition, order[i]); 1055 1056 total_size -= order[i]->global.size; 1056 1057 1057 1058 /* Once we added a new node to the partition, we also want to add … … 1231 1232 } 1232 1233 i = best_i; 1233 1234 /* When we are finished, avoid creating empty partition. */ 1235 while (i < n_nodes - 1 && order[i + 1]->aux) 1236 i++; 1234 1237 if (i == n_nodes - 1) 1235 1238 break; 1236 1239 partition = new_partition (""); -
gcc/predict.c
diff -Naur gcc-4.6.3.orig/gcc/predict.c gcc-4.6.3/gcc/predict.c
old new 1790 1790 static void 1791 1791 predict_paths_for_bb (basic_block cur, basic_block bb, 1792 1792 enum br_predictor pred, 1793 enum prediction taken) 1793 enum prediction taken, 1794 bitmap visited) 1794 1795 { 1795 1796 edge e; 1796 1797 edge_iterator ei; … … 1811 1812 continue; 1812 1813 gcc_assert (bb == cur || dominated_by_p (CDI_POST_DOMINATORS, cur, bb)); 1813 1814 1814 /* See if there is how manyedge from e->src that is not abnormal1815 /* See if there is an edge from e->src that is not abnormal 1815 1816 and does not lead to BB. */ 1816 1817 FOR_EACH_EDGE (e2, ei2, e->src->succs) 1817 1818 if (e2 != e … … 1824 1825 1825 1826 /* If there is non-abnormal path leaving e->src, predict edge 1826 1827 using predictor. Otherwise we need to look for paths 1827 leading to e->src. */ 1828 leading to e->src. 1829 1830 The second may lead to infinite loop in the case we are predicitng 1831 regions that are only reachable by abnormal edges. We simply 1832 prevent visiting given BB twice. */ 1828 1833 if (found) 1829 1834 predict_edge_def (e, pred, taken); 1830 else 1831 predict_paths_for_bb (e->src, e->src, pred, taken );1835 else if (bitmap_set_bit (visited, e->src->index)) 1836 predict_paths_for_bb (e->src, e->src, pred, taken, visited); 1832 1837 } 1833 1838 for (son = first_dom_son (CDI_POST_DOMINATORS, cur); 1834 1839 son; 1835 1840 son = next_dom_son (CDI_POST_DOMINATORS, son)) 1836 predict_paths_for_bb (son, bb, pred, taken );1841 predict_paths_for_bb (son, bb, pred, taken, visited); 1837 1842 } 1838 1843 1839 1844 /* Sets branch probabilities according to PREDiction and … … 1843 1848 predict_paths_leading_to (basic_block bb, enum br_predictor pred, 1844 1849 enum prediction taken) 1845 1850 { 1846 predict_paths_for_bb (bb, bb, pred, taken); 1851 bitmap visited = BITMAP_ALLOC (NULL); 1852 predict_paths_for_bb (bb, bb, pred, taken, visited); 1853 BITMAP_FREE (visited); 1847 1854 } 1848 1855 1849 1856 /* Like predict_paths_leading_to but take edge instead of basic block. */ … … 1866 1873 break; 1867 1874 } 1868 1875 if (!has_nonloop_edge) 1869 predict_paths_for_bb (bb, bb, pred, taken); 1876 { 1877 bitmap visited = BITMAP_ALLOC (NULL); 1878 predict_paths_for_bb (bb, bb, pred, taken, visited); 1879 BITMAP_FREE (visited); 1880 } 1870 1881 else 1871 1882 predict_edge_def (e, pred, taken); 1872 1883 } -
gcc/stor-layout.c
diff -Naur gcc-4.6.3.orig/gcc/stor-layout.c gcc-4.6.3/gcc/stor-layout.c
old new 660 660 /* See if we can use an ordinary integer mode for a bit-field. 661 661 Conditions are: a fixed size that is correct for another mode, 662 662 occupying a complete byte or bytes on proper boundary, 663 and not volatile or not -fstrict-volatile-bitfields. */ 663 and not -fstrict-volatile-bitfields. If the latter is set, 664 we unfortunately can't check TREE_THIS_VOLATILE, as a cast 665 may make a volatile object later. */ 664 666 if (TYPE_SIZE (type) != 0 665 667 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST 666 668 && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT 667 && !(TREE_THIS_VOLATILE (decl) 668 && flag_strict_volatile_bitfields > 0)) 669 && flag_strict_volatile_bitfields <= 0) 669 670 { 670 671 enum machine_mode xmode 671 672 = mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1); … … 1926 1927 TYPE_SIZE (type) = int_const_binop (MULT_EXPR, TYPE_SIZE (innertype), 1927 1928 bitsize_int (nunits), 0); 1928 1929 1929 /* Always naturally align vectors. This prevents ABI changes 1930 depending on whether or not native vector modes are supported. */ 1931 TYPE_ALIGN (type) = tree_low_cst (TYPE_SIZE (type), 0); 1930 /* For vector types, we do not default to the mode's alignment. 1931 Instead, query a target hook, defaulting to natural alignment. 1932 This prevents ABI changes depending on whether or not native 1933 vector modes are supported. */ 1934 TYPE_ALIGN (type) = targetm.vector_alignment (type); 1935 1936 /* However, if the underlying mode requires a bigger alignment than 1937 what the target hook provides, we cannot use the mode. For now, 1938 simply reject that case. */ 1939 gcc_assert (TYPE_ALIGN (type) 1940 >= GET_MODE_ALIGNMENT (TYPE_MODE (type))); 1932 1941 break; 1933 1942 } 1934 1943 -
gcc/target.def
diff -Naur gcc-4.6.3.orig/gcc/target.def gcc-4.6.3/gcc/target.def
old new 1611 1611 bool, (enum machine_mode mode), 1612 1612 hook_bool_mode_false) 1613 1613 1614 DEFHOOK 1615 (vector_alignment, 1616 "This hook can be used to define the alignment for a vector of type\n\ 1617 @var{type}, in order to comply with a platform ABI. The default is to\n\ 1618 require natural alignment for vector types. The alignment returned by\n\ 1619 this hook must be a power-of-two multiple of the default alignment of\n\ 1620 the vector element type.", 1621 HOST_WIDE_INT, (const_tree type), 1622 default_vector_alignment) 1623 1614 1624 /* Compute cost of moving data from a register of class FROM to one of 1615 1625 TO, using MODE. */ 1616 1626 DEFHOOK -
gcc/target.h
diff -Naur gcc-4.6.3.orig/gcc/target.h gcc-4.6.3/gcc/target.h
old new 128 128 scalar_to_vec, 129 129 cond_branch_not_taken, 130 130 cond_branch_taken, 131 vec_perm 131 vec_perm, 132 vec_promote_demote 132 133 }; 133 134 134 135 /* Sets of optimization levels at which an option may be enabled by -
gcc/targhooks.c
diff -Naur gcc-4.6.3.orig/gcc/targhooks.c gcc-4.6.3/gcc/targhooks.c
old new 529 529 case scalar_to_vec: 530 530 case cond_branch_not_taken: 531 531 case vec_perm: 532 case vec_promote_demote: 532 533 return 1; 533 534 534 535 case unaligned_load: … … 978 979 return id; 979 980 } 980 981 982 /* Default to natural alignment for vector types. */ 983 HOST_WIDE_INT 984 default_vector_alignment (const_tree type) 985 { 986 return tree_low_cst (TYPE_SIZE (type), 0); 987 } 988 981 989 bool 982 990 default_builtin_vector_alignment_reachable (const_tree type, bool is_packed) 983 991 { -
gcc/targhooks.h
diff -Naur gcc-4.6.3.orig/gcc/targhooks.h gcc-4.6.3/gcc/targhooks.h
old new 85 85 86 86 extern tree default_builtin_reciprocal (unsigned int, bool, bool); 87 87 88 extern HOST_WIDE_INT default_vector_alignment (const_tree); 89 88 90 extern bool default_builtin_vector_alignment_reachable (const_tree, bool); 89 91 extern bool 90 92 default_builtin_support_vector_misalignment (enum machine_mode mode, -
gcc/testsuite/c-c++-common/abi-bf.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/c-c++-common/abi-bf.c gcc-4.6.3/gcc/testsuite/c-c++-common/abi-bf.c
old new 1 /* { dg-warning "incompatible" } */ 2 /* { dg-do compile } */ 3 /* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */ -
gcc/testsuite/g++.dg/cpp0x/nullptr28.C
diff -Naur gcc-4.6.3.orig/gcc/testsuite/g++.dg/cpp0x/nullptr28.C gcc-4.6.3/gcc/testsuite/g++.dg/cpp0x/nullptr28.C
old new 1 // { dg-do run } 2 // { dg-options "-std=c++0x -pedantic-errors" } 3 4 typedef decltype(nullptr) nullptr_t; 5 6 int i; 7 nullptr_t n; 8 const nullptr_t& f() { ++i; return n; } 9 10 nullptr_t g() { return f(); } 11 12 int main() 13 { 14 g(); 15 if (i != 1) 16 __builtin_abort (); 17 } -
gcc/testsuite/g++.dg/cpp0x/variadic-value1.C
diff -Naur gcc-4.6.3.orig/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C gcc-4.6.3/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C
old new 1 // PR c++/52796 2 // { dg-options "-std=c++0x -pedantic-errors" } 3 4 inline void *operator new(__SIZE_TYPE__ s, void *p) { return p; } 5 6 struct A 7 { 8 int i; 9 template<class... Ts> 10 A(Ts&&... ts): i(ts...) { } 11 }; 12 13 static union { 14 unsigned char c[sizeof(A)]; 15 int i; 16 }; 17 18 int main() 19 { 20 i = 0xdeadbeef; 21 new(c) A; 22 if (i != 0) 23 __builtin_abort(); 24 } -
gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c gcc-4.6.3/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c
old new 1 /* Inspired by the test case for PR middle-end/52640. */ 2 3 typedef struct 4 { 5 char *value; 6 } REFERENCE; 7 8 /* Add a few "extern int Xxxxxx ();" declarations. */ 9 #undef DEF 10 #undef LIM1 11 #undef LIM2 12 #undef LIM3 13 #undef LIM4 14 #undef LIM5 15 #undef LIM6 16 #define DEF(x) extern int x () 17 #define LIM1(x) DEF(x##0); DEF(x##1); DEF(x##2); DEF(x##3); DEF(x##4); \ 18 DEF(x##5); DEF(x##6); DEF(x##7); DEF(x##8); DEF(x##9); 19 #define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ 20 LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) 21 #define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ 22 LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) 23 #define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ 24 LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) 25 #define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ 26 LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) 27 #define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ 28 LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) 29 LIM5 (X); 30 31 /* Add references to them, or GCC will simply ignore the extern decls. */ 32 #undef DEF 33 #undef LIM1 34 #undef LIM2 35 #undef LIM3 36 #undef LIM4 37 #undef LIM5 38 #undef LIM6 39 #define DEF(x) (char *) x 40 #define LIM1(x) DEF(x##0), DEF(x##1), DEF(x##2), DEF(x##3), DEF(x##4), \ 41 DEF(x##5), DEF(x##6), DEF(x##7), DEF(x##8), DEF(x##9), 42 #define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ 43 LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) 44 #define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ 45 LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) 46 #define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ 47 LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) 48 #define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ 49 LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) 50 #define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ 51 LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) 52 REFERENCE references[] = { 53 LIM5 (X) 54 0 55 }; 56 -
gcc/testsuite/gcc.c-torture/compile/pr53418-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.c-torture/compile/pr53418-1.c gcc-4.6.3/gcc/testsuite/gcc.c-torture/compile/pr53418-1.c
old new 1 void 2 f (void) 3 { 4 int i = (0 ? 1 : 0U / 0); 5 } -
gcc/testsuite/gcc.c-torture/compile/pr53418-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.c-torture/compile/pr53418-2.c gcc-4.6.3/gcc/testsuite/gcc.c-torture/compile/pr53418-2.c
old new 1 void 2 f (void) 3 { 4 int i = (1 ? 0U / 0 : 1); 5 } -
gcc/testsuite/gcc.c-torture/execute/20120427-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.c-torture/execute/20120427-1.c gcc-4.6.3/gcc/testsuite/gcc.c-torture/execute/20120427-1.c
old new 1 typedef struct sreal 2 { 3 unsigned sig; /* Significant. */ 4 int exp; /* Exponent. */ 5 } sreal; 6 7 sreal_compare (sreal *a, sreal *b) 8 { 9 if (a->exp > b->exp) 10 return 1; 11 if (a->exp < b->exp) 12 return -1; 13 if (a->sig > b->sig) 14 return 1; 15 return -(a->sig < b->sig); 16 } 17 18 sreal a[] = { 19 { 0, 0 }, 20 { 1, 0 }, 21 { 0, 1 }, 22 { 1, 1 } 23 }; 24 25 int main() 26 { 27 int i, j; 28 for (i = 0; i <= 3; i++) { 29 for (j = 0; j < 3; j++) { 30 if (i < j && sreal_compare(&a[i], &a[j]) != -1) abort(); 31 if (i == j && sreal_compare(&a[i], &a[j]) != 0) abort(); 32 if (i > j && sreal_compare(&a[i], &a[j]) != 1) abort(); 33 } 34 } 35 return 0; 36 } -
gcc/testsuite/gcc.c-torture/execute/pr53084.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.c-torture/execute/pr53084.c gcc-4.6.3/gcc/testsuite/gcc.c-torture/execute/pr53084.c
old new 1 /* PR middle-end/53084 */ 2 3 extern void abort (void); 4 5 __attribute__((noinline, noclone)) void 6 bar (const char *p) 7 { 8 if (p[0] != 'o' || p[1] != 'o' || p[2]) 9 abort (); 10 } 11 12 int 13 main () 14 { 15 static const char *const foo[] = {"foo" + 1}; 16 bar (foo[0]); 17 return 0; 18 } -
gcc/testsuite/gcc.dg/20020201-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/20020201-1.c gcc-4.6.3/gcc/testsuite/gcc.dg/20020201-1.c
old new 7 7 /* { dg-options "-fprofile-arcs" } */ 8 8 /* { dg-do run { target native } } */ 9 9 10 extern void abort (void); 11 extern void exit (int); 12 13 int rand (void); 14 void srand (unsigned int seed); 10 #include <stdlib.h> 15 11 16 12 int globvar; 17 13 -
gcc/testsuite/gcc.dg/align-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/align-2.c gcc-4.6.3/gcc/testsuite/gcc.dg/align-2.c
old new 1 1 /* PR 17962 */ 2 /* { dg-do compile } */2 /* { dg-do compile { target vect_natural_alignment } } */ 3 3 /* { dg-options "" } */ 4 4 5 5 typedef float v4 __attribute__((vector_size(sizeof(float)*4))); -
gcc/testsuite/gcc.dg/pr52862.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/pr52862.c gcc-4.6.3/gcc/testsuite/gcc.dg/pr52862.c
old new 1 /* { dg-do compile } */ 2 /* { dg-options "-O" } */ 3 4 void ASMAtomicWritePtrVoid(const void *pv); 5 void rtThreadDestroy(void) 6 { 7 void * const pvTypeChecked = ((void *)0); 8 ASMAtomicWritePtrVoid((void *)(pvTypeChecked)); 9 } -
gcc/testsuite/gcc.dg/stack-usage-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/stack-usage-1.c gcc-4.6.3/gcc/testsuite/gcc.dg/stack-usage-1.c
old new 41 41 # define SIZE 160 /* 256 - 96 bytes for register save area */ 42 42 #elif defined (__SPU__) 43 43 # define SIZE 224 44 #elif defined (__sh__) 45 # define SIZE 252 44 46 #else 45 47 # define SIZE 256 46 48 #endif -
gcc/testsuite/gcc.dg/torture/pr51071-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr51071-2.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr51071-2.c
old new 1 /* { dg-do compile } */ 2 /* { dg-options "-fno-delete-null-pointer-checks" } */ 3 4 extern struct module __this_module; 5 static inline void 6 trace_module_get (struct module *mod, unsigned long ip) { } 7 struct module; 8 static inline __attribute__((no_instrument_function)) 9 int try_module_get(struct module *module) 10 { 11 int ret = 1; 12 if (module) 13 { 14 if (module_is_live(module)) 15 { 16 __label__ __here; 17 asm(""); 18 __here: 19 trace_module_get(module, (unsigned long)&&__here); 20 } 21 else 22 ret = 0; 23 } 24 return ret; 25 } 26 struct net_device; 27 struct net_device_ops { 28 int (*ndo_open)(struct net_device *dev); 29 }; 30 int t3e3_open(struct net_device *dev) 31 { 32 int ret = hdlc_open(dev); 33 if (ret) 34 return ret; 35 try_module_get((&__this_module)); 36 return 0; 37 } 38 const struct net_device_ops t3e3_ops = { .ndo_open = t3e3_open }; -
gcc/testsuite/gcc.dg/torture/pr51071.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr51071.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr51071.c
old new 1 /* { dg-do compile } */ 2 3 void foo (void); 4 void bar (void *); 5 extern int t; 6 7 static void kmalloc_large (int size, int flags) 8 { 9 (void) size; 10 (void) flags; 11 foo (); 12 bar (({__here:&&__here;})); 13 } 14 15 static void kmalloc (int size, int flags) 16 { 17 if (size) 18 { 19 if ((unsigned long) size > 0x1000) 20 kmalloc_large (size, flags); 21 22 if (flags) 23 bar (({__here:&&__here;})); 24 } 25 } 26 27 void compress_file_range (int i, int j, int k) 28 { 29 int nr_pages = ({j < k;}); 30 31 if (i || t) 32 kmalloc (0x1000UL * nr_pages, 0x40UL); 33 } -
gcc/testsuite/gcc.dg/torture/pr52407.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr52407.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr52407.c
old new 1 /* { dg-do run } */ 2 3 extern void abort (void); 4 5 typedef long long T; 6 typedef T vl_t __attribute__((vector_size(2 * sizeof (T)))); 7 8 vl_t ul[4], vl[4] = { { 1, 2 }, { 3, 4 }, { 5, 6 }, { 7, 8 } }; 9 10 static void 11 mul_vl_l(vl_t *u, vl_t *v, T x, int m) 12 { 13 vl_t w; 14 T *p = (T *)&w; 15 p[0] = p[1] = x; 16 while (m--) 17 *u++ = *v++ * w; 18 } 19 20 int 21 main(int argc, char *argv[]) 22 { 23 int i; 24 T *pl; 25 26 pl = (T *) &ul; 27 mul_vl_l(ul, vl, 2, 4); 28 for (i = 0; i < 8; i++) 29 if (pl[i] != 2 * (i + 1)) 30 abort (); 31 32 return 0; 33 } -
gcc/testsuite/gcc.dg/torture/pr52693.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr52693.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr52693.c
old new 1 /* { dg-do run } */ 2 3 struct pair 4 { 5 int x; 6 int y; 7 }; 8 9 struct array 10 { 11 struct pair elems[ 2 ]; 12 unsigned index; 13 }; 14 15 extern void abort (); 16 17 void __attribute__ ((noinline,noclone)) 18 test_results (int x1, int y1, int x2, int y2) 19 { 20 if (x1 != x2 || y1 != y2) 21 abort (); 22 } 23 24 int 25 main (void) 26 { 27 struct array arr = {{{1,2}, {3,4}}, 1}; 28 struct pair last = arr.elems[arr.index]; 29 30 test_results ( last.x, last.y, arr.elems[1].x, arr.elems[1].y); 31 32 return 0; 33 } -
gcc/testsuite/gcc.dg/torture/pr53790.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr53790.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr53790.c
old new 1 /* { dg-do compile } */ 2 3 typedef struct s { 4 int value; 5 } s_t; 6 7 static inline int 8 read(s_t const *var) 9 { 10 return var->value; 11 } 12 13 int main() 14 { 15 extern union u extern_var; 16 return read((s_t *)&extern_var); 17 } -
gcc/testsuite/gcc.dg/torture/pr53908.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/torture/pr53908.c gcc-4.6.3/gcc/testsuite/gcc.dg/torture/pr53908.c
old new 1 /* { dg-do run } */ 2 /* SEGV at comment below. */ 3 typedef unsigned int size_t; 4 typedef enum har { 5 he_fatal = (-199), 6 he_not_initialized, 7 he_bad_input, 8 he_memory_too_small, 9 he_bad_action, 10 he_duplicate, 11 he_bad_nonce, 12 he_stale_nonce, 13 he_bad_credentials, 14 he_bad_user, 15 he_no_such_user, 16 he_bad_passwd, 17 he_unknown_auth_scheme, 18 he_not_found, 19 he_failed_digest_file_check, 20 he_failed_digest_file_save, 21 he_process_not_privileged, 22 he_other, 23 he_end_of_range, 24 ha_no_error = 0, 25 ha_no_value = 1 26 } har; 27 typedef enum realm_type 28 { 29 axis_realm = 0, 30 ws_realm 31 } realm_type; 32 33 __attribute__((__noclone__, __noinline__)) 34 har has_www_auth(char *, size_t, realm_type, har); 35 36 __attribute__((__noclone__, __noinline__)) 37 har has_auth_user(const char *, const char *, realm_type, char *, size_t); 38 39 __attribute__((__noclone__, __noinline__)) 40 char *ha_get_string_value(void); 41 42 typedef struct 43 { 44 unsigned int track_id; 45 char* user; 46 char* realm; 47 char* authent; 48 int internal_realm; 49 } request; 50 enum user_response { 51 file_not_found_user_response = -3, 52 access_denied_user_response = -2, 53 no_user_response = -1, 54 ok_user_response = 0 55 }; 56 struct realm_group { 57 char *name; 58 int id; 59 struct realm_group *next; 60 }; 61 struct realm { 62 char *name; 63 char *space; 64 struct realm_group *groups; 65 struct realm *next; 66 }; 67 struct user_info { 68 char *name; 69 int no_groups; 70 int groups[128]; 71 struct user_info *next; 72 }; 73 static struct user_info *find_user(const char *user_name); 74 static int is_member_of_groups(const struct user_info *user_item, 75 const struct realm_group *groups); 76 int authent_author(request *req); 77 struct realm *realms = ((void *)0); 78 struct user_info *users = ((void *)0); 79 static struct user_info* 80 find_user(const char *user_name) 81 { 82 struct user_info *user_item; 83 user_item = users; 84 while (user_item != ((void *)0)) { 85 /* SEGV due to NULL access here on user_name. See also comment below. */ 86 if ((__builtin_strcmp(user_item->name, user_name) == 0)) 87 break; 88 user_item = user_item->next; 89 } 90 return user_item; 91 } 92 static int 93 is_member_of_groups(const struct user_info *user_item, 94 const struct realm_group *groups) 95 { 96 const struct realm_group *group_item; 97 int i; 98 group_item = groups; 99 while (group_item != ((void *)0)) { 100 for (i = 0; i < user_item->no_groups; i++) 101 if (user_item->groups[i] == group_item->id) 102 return 0; 103 group_item = group_item->next; 104 } 105 return -1; 106 } 107 char *foo (void) __attribute__((__noclone__, __noinline__)); 108 char* g_strdup (const char *str) __attribute__((__malloc__, __noclone__, __noinline__)); 109 int g_strcmp0 (const char *str1, const char *str2); 110 static int 111 is_basic(char **user) 112 { 113 char *passwd_ptr; 114 char *authent = foo(); 115 passwd_ptr = __builtin_strchr(authent, ':'); 116 if (passwd_ptr != ((void *)0)) { 117 *user = g_strdup(authent); 118 return 0; 119 } 120 return -1; 121 } 122 static int 123 is_digest(char **user) 124 { 125 int ret_val = -1; 126 char *authent; 127 authent = ha_get_string_value(); 128 if (authent) { 129 *user = g_strdup(authent); 130 ret_val = 0; 131 } 132 return ret_val; 133 } 134 __attribute__((__noclone__, __noinline__)) 135 void g_free (void * mem); 136 static enum user_response 137 get_user_info_from_header(const realm_type type, 138 char **user_name, 139 struct user_info **user_item) 140 { 141 int ret_val = no_user_response; 142 if ((type == ws_realm)) { 143 if (is_basic(user_name) == 0) 144 ret_val = access_denied_user_response; 145 if (is_digest(user_name) == 0) 146 ret_val = ok_user_response; 147 } else { 148 if (is_basic(user_name) < 0 && 149 /* Load of *user_name here, but not after the is_digest call. */ 150 is_digest(user_name) < 0) 151 ; 152 else if ((*user_item = find_user(*user_name)) != ((void *)0)) 153 ret_val = ok_user_response; 154 else 155 ret_val = access_denied_user_response; 156 if (ret_val != ok_user_response) 157 g_free(*user_name); 158 } 159 return ret_val; 160 } 161 static enum user_response 162 authenticate_user(request *req, 163 char **user_name, 164 struct user_info **user_item) 165 { 166 char *authent = ((void *)0); 167 har resp = ha_no_value; 168 enum user_response user_resp; 169 int ret_val = no_user_response; 170 if (req->authent && __builtin_strlen(req->authent)) { 171 authent = req->authent; 172 user_resp = get_user_info_from_header(req->internal_realm, 173 user_name, 174 user_item); 175 if (user_resp == ok_user_response) { 176 resp = has_auth_user(authent, 0, req->internal_realm, "", 1); 177 if (resp == ha_no_error) 178 ret_val = ok_user_response; 179 else if (resp != he_stale_nonce) 180 ret_val = access_denied_user_response; 181 } else if (user_resp == access_denied_user_response) 182 ret_val = access_denied_user_response; 183 } 184 if (resp != he_memory_too_small && resp != ha_no_error) 185 resp = has_www_auth("", 1, req->internal_realm, resp); 186 return ret_val; 187 } 188 189 int __attribute__ ((__noinline__, __noclone__)) 190 authent_author(request *req) 191 { 192 struct realm *realm; 193 char *user_name = ((void *)0); 194 struct user_info *user_item = ((void *)0); 195 int res = 0; 196 asm (""); 197 realm = realms; 198 if (__builtin_strcmp("Wsd", realm->name) == 0) { 199 req->internal_realm = ws_realm; 200 is_digest(&user_name); 201 } 202 if (authenticate_user(req, &user_name, &user_item) < 0) { 203 if (user_name != ((void *)0)) 204 req->user = user_name; 205 res = -2; 206 goto authent_author_return; 207 } 208 if (is_member_of_groups(user_item, realm->groups) < 0) 209 res = -1; 210 authent_author_return: 211 return res; 212 } 213 214 int good0, good1, good2; 215 216 __attribute__ ((__noinline__, __noclone__)) 217 char *foo(void) 218 { 219 asm (""); 220 good0++; 221 return ""; 222 } 223 224 __attribute__ ((__noinline__, __noclone__)) 225 char *ha_get_string_value(void) 226 { 227 asm (""); 228 good1++; 229 return "f"; 230 } 231 232 __attribute__ ((__noinline__, __noclone__)) 233 har has_auth_user(const char *a, const char *b, realm_type c, char *d, size_t e) 234 { 235 asm (""); 236 if (*a != 'z' || a[1] != 0 || b != 0 || c != axis_realm || *d != 0 237 || e != 1) 238 __builtin_abort (); 239 return ha_no_error; 240 } 241 242 __attribute__ ((__noinline__, __noclone__)) 243 har has_www_auth(char *a, size_t b, realm_type c, har d) 244 { 245 (void)(*a+b+c+d); 246 asm (""); 247 __builtin_abort (); 248 } 249 250 251 char *strdupped_user = "me"; 252 __attribute__((__malloc__, __noclone__, __noinline__)) 253 char* g_strdup (const char *str) 254 { 255 asm (""); 256 if (*str != 'f') 257 __builtin_abort (); 258 good2++; 259 return strdupped_user; 260 } 261 262 __attribute__((__noclone__, __noinline__)) 263 void g_free (void * mem) 264 { 265 (void)mem; 266 asm (""); 267 __builtin_abort (); 268 } 269 270 struct user_info me = { .name = "me", .no_groups = 1, .groups = {42}, .next = 0}; 271 struct user_info you = { .name = "you", .next = &me}; 272 struct realm_group xgroups = { .name = "*", .id = 42, .next = 0}; 273 274 int main(void) 275 { 276 char *orig_user = "?"; 277 struct realm r = { .name = "x", .space = "space?", .groups = &xgroups, .next = 0}; 278 request req = { .user = orig_user, .realm = "!", .authent = "z", 279 .internal_realm = axis_realm}; 280 realms = &r; 281 users = &you; 282 if (authent_author (&req) != 0 || good0 != 1 || good1 != 1 || good2 != 1 283 || req.user != orig_user 284 || req.internal_realm != axis_realm) 285 __builtin_abort (); 286 __builtin_exit (0); 287 } 288 -
gcc/testsuite/gcc.dg/vect/slp-25.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/vect/slp-25.c gcc-4.6.3/gcc/testsuite/gcc.dg/vect/slp-25.c
old new 57 57 58 58 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ 59 59 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */ 60 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align } } } } */60 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align || { ! vect_natural_alignment } } } } } */ 61 61 /* { dg-final { cleanup-tree-dump "vect" } } */ -
gcc/testsuite/gcc.dg/vect/vect-peel-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/vect/vect-peel-1.c gcc-4.6.3/gcc/testsuite/gcc.dg/vect/vect-peel-1.c
old new 49 49 } 50 50 51 51 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ 52 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_element_align} } } */52 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ 53 53 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */ 54 54 /* { dg-final { cleanup-tree-dump "vect" } } */ -
gcc/testsuite/gcc.dg/vect/vect-peel-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/vect/vect-peel-2.c gcc-4.6.3/gcc/testsuite/gcc.dg/vect/vect-peel-2.c
old new 50 50 } 51 51 52 52 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ 53 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_element_align} } } */54 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target vect_element_align} } } */53 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ 54 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ 55 55 /* { dg-final { cleanup-tree-dump "vect" } } */ -
gcc/testsuite/gcc.dg/vect/vect-peel-3.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/vect/vect-peel-3.c gcc-4.6.3/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
old new 4 4 #include "tree-vect.h" 5 5 6 6 #define N 128 7 #define RES 21888 8 9 /* unaligned store. */ 7 #define RES 21640 10 8 11 9 int ib[N+10]; 12 10 int ia[N+10]; … … 18 16 int i, suma = 0, sumb = 0, sumc = 0; 19 17 20 18 /* ib and ic have same misalignment, we peel to align them. */ 21 for (i = 1; i <= N; i++)19 for (i = 0; i <= N; i++) 22 20 { 23 21 suma += ia[i]; 24 sumb += ib[i+ 6];25 sumc += ic[i+ 2];22 sumb += ib[i+5]; 23 sumc += ic[i+1]; 26 24 } 27 25 28 26 /* check results: */ … … 49 47 return main1 (); 50 48 } 51 49 52 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */50 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */ 53 51 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */ 54 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */52 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } } } */ 55 53 /* { dg-final { cleanup-tree-dump "vect" } } */ -
gcc/testsuite/gcc.dg/vect/vect-peel-4.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/vect/vect-peel-4.c gcc-4.6.3/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
old new 16 16 /* Don't peel keeping one load and the store aligned. */ 17 17 for (i = 0; i <= N; i++) 18 18 { 19 ia[i] = ib[i] + ib[i+ 6];19 ia[i] = ib[i] + ib[i+5]; 20 20 } 21 21 22 22 /* check results: */ 23 23 for (i = 1; i <= N; i++) 24 24 { 25 if (ia[i] != ib[i] + ib[i+ 6])25 if (ia[i] != ib[i] + ib[i+5]) 26 26 abort (); 27 27 } 28 28 … … 44 44 return main1 (); 45 45 } 46 46 47 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */47 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */ 48 48 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */ 49 49 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */ 50 50 /* { dg-final { cleanup-tree-dump "vect" } } */ -
gcc/testsuite/gcc.dg/volatile-bitfields-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.dg/volatile-bitfields-2.c gcc-4.6.3/gcc/testsuite/gcc.dg/volatile-bitfields-2.c
old new 1 /* { dg-do run } */ 2 /* { dg-options "-fstrict-volatile-bitfields" } */ 3 4 extern void abort(void); 5 struct thing { 6 volatile unsigned short a: 8; 7 volatile unsigned short b: 8; 8 } t = {1,2}; 9 10 int main() 11 { 12 t.a = 3; 13 if (t.a !=3 || t.b !=2) abort(); 14 return 0; 15 } -
gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c gcc-4.6.3/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
old new 1 /* { dg-require-effective-target arm_eabi } */ 2 /* { dg-do compile } */ 3 /* { dg-options "-O2" } */ 4 /* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ 5 /* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ 6 /* { dg-final { scan-assembler-not "strb" } } */ 7 8 struct thing { 9 unsigned a: 8; 10 unsigned b: 8; 11 unsigned c: 8; 12 unsigned d: 8; 13 }; 14 15 struct thing2 { 16 volatile unsigned a: 8; 17 volatile unsigned b: 8; 18 volatile unsigned c: 8; 19 volatile unsigned d: 8; 20 }; 21 22 void test1(volatile struct thing *t) 23 { 24 t->a = 5; 25 } 26 27 void test2(struct thing2 *t) 28 { 29 t->a = 5; 30 } -
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
old new 14 14 c[i] = a[i] * b[i+3]; 15 15 } 16 16 17 /* { dg-final { scan-assembler-not " \\*avx_movups256/1" } } */18 /* { dg-final { scan-assembler " \\*avx_movups/1" } } */17 /* { dg-final { scan-assembler-not "avx_movups256/1" } } */ 18 /* { dg-final { scan-assembler "avx_movups/1" } } */ 19 19 /* { dg-final { scan-assembler "vinsertf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
old new 24 24 } 25 25 } 26 26 27 /* { dg-final { scan-assembler-not " \\*avx_movdqu256/1" } } */28 /* { dg-final { scan-assembler " \\*avx_movdqu/1" } } */27 /* { dg-final { scan-assembler-not "avx_movdqu256/1" } } */ 28 /* { dg-final { scan-assembler "avx_movdqu/1" } } */ 29 29 /* { dg-final { scan-assembler "vinsertf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
old new 14 14 c[i] = a[i] * b[i+3]; 15 15 } 16 16 17 /* { dg-final { scan-assembler-not " \\*avx_movupd256/1" } } */18 /* { dg-final { scan-assembler " \\*avx_movupd/1" } } */17 /* { dg-final { scan-assembler-not "avx_movupd256/1" } } */ 18 /* { dg-final { scan-assembler "avx_movupd/1" } } */ 19 19 /* { dg-final { scan-assembler "vinsertf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
old new 14 14 b[i] = a[i+3] * 2; 15 15 } 16 16 17 /* { dg-final { scan-assembler " \\*avx_movups256/1" } } */18 /* { dg-final { scan-assembler-not " \\*avx_movups/1" } } */17 /* { dg-final { scan-assembler "avx_movups256/1" } } */ 18 /* { dg-final { scan-assembler-not "avx_movups/1" } } */ 19 19 /* { dg-final { scan-assembler-not "vinsertf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
old new 17 17 d[i] = c[i] * 20.0; 18 18 } 19 19 20 /* { dg-final { scan-assembler-not " \\*avx_movups256/2" } } */20 /* { dg-final { scan-assembler-not "avx_movups256/2" } } */ 21 21 /* { dg-final { scan-assembler "movups.*\\*avx_movv4sf_internal/3" } } */ 22 22 /* { dg-final { scan-assembler "vextractf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
old new 24 24 } 25 25 } 26 26 27 /* { dg-final { scan-assembler-not " \\*avx_movdqu256/2" } } */27 /* { dg-final { scan-assembler-not "avx_movdqu256/2" } } */ 28 28 /* { dg-final { scan-assembler "movdqu.*\\*avx_movv16qi_internal/3" } } */ 29 29 /* { dg-final { scan-assembler "vextractf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
old new 17 17 d[i] = c[i] * 20.0; 18 18 } 19 19 20 /* { dg-final { scan-assembler-not " \\*avx_movupd256/2" } } */20 /* { dg-final { scan-assembler-not "avx_movupd256/2" } } */ 21 21 /* { dg-final { scan-assembler "movupd.*\\*avx_movv2df_internal/3" } } */ 22 22 /* { dg-final { scan-assembler "vextractf128" } } */ -
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
old new 14 14 b[i+3] = a[i] * c[i]; 15 15 } 16 16 17 /* { dg-final { scan-assembler " \\*avx_movups256/2" } } */18 /* { dg-final { scan-assembler-not " \\*avx_movups/2" } } */17 /* { dg-final { scan-assembler "avx_movups256/2" } } */ 18 /* { dg-final { scan-assembler-not "avx_movups/2" } } */ 19 19 /* { dg-final { scan-assembler-not "\\*avx_movv4sf_internal/3" } } */ 20 20 /* { dg-final { scan-assembler-not "vextractf128" } } */ -
gcc/testsuite/gcc.target/i386/pr52736.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/pr52736.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/pr52736.c
old new 1 /* PR target/52736 */ 2 /* { dg-do run } */ 3 /* { dg-options "-O1 -msse2" } */ 4 /* { dg-require-effective-target sse2_runtime } */ 5 6 #include <x86intrin.h> 7 8 typedef double D __attribute__((may_alias)); 9 __attribute__((aligned(16))) static const double r[4] = { 1., 5., 1., 3. }; 10 11 __attribute__((noinline, noclone)) 12 void 13 foo (int x) 14 { 15 asm volatile ("" : "+g" (x) : : "memory"); 16 if (x != 3) 17 __builtin_abort (); 18 } 19 20 int 21 main () 22 { 23 __m128d t = _mm_set1_pd (5.); 24 ((D *)(&t))[0] = 1.; 25 foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[0])))); 26 ((D *)(&t))[1] = 3.; 27 foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[2])))); 28 return 0; 29 } -
gcc/testsuite/gcc.target/i386/pr53416.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/i386/pr53416.c gcc-4.6.3/gcc/testsuite/gcc.target/i386/pr53416.c
old new 1 /* PR target/53416 */ 2 /* { dg-options "-O2 -mrdrnd" } */ 3 4 int test (void) 5 { 6 unsigned int number = 0; 7 int result0, result1, result2, result3; 8 9 result0 = __builtin_ia32_rdrand32_step (&number); 10 result1 = __builtin_ia32_rdrand32_step (&number); 11 result2 = __builtin_ia32_rdrand32_step (&number); 12 result3 = __builtin_ia32_rdrand32_step (&number); 13 14 return result0 + result1 +result2 + result3; 15 } 16 17 /* { dg-final { scan-assembler-times "rdrand" 4 } } */ -
gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "lvlx" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 vsc lc1(long a, void *p) { return __builtin_altivec_lvlx (a,p); } 31 vsf llx01(long a, vsf *p) { return __builtin_vec_lvlx (a,p); } 32 vsf llx02(long a, sf *p) { return __builtin_vec_lvlx (a,p); } 33 vbi llx03(long a, vbi *p) { return __builtin_vec_lvlx (a,p); } 34 vsi llx04(long a, vsi *p) { return __builtin_vec_lvlx (a,p); } 35 vsi llx05(long a, si *p) { return __builtin_vec_lvlx (a,p); } 36 vui llx06(long a, vui *p) { return __builtin_vec_lvlx (a,p); } 37 vui llx07(long a, ui *p) { return __builtin_vec_lvlx (a,p); } 38 vbs llx08(long a, vbs *p) { return __builtin_vec_lvlx (a,p); } 39 vp llx09(long a, vp *p) { return __builtin_vec_lvlx (a,p); } 40 vss llx10(long a, vss *p) { return __builtin_vec_lvlx (a,p); } 41 vss llx11(long a, ss *p) { return __builtin_vec_lvlx (a,p); } 42 vus llx12(long a, vus *p) { return __builtin_vec_lvlx (a,p); } 43 vus llx13(long a, us *p) { return __builtin_vec_lvlx (a,p); } 44 vbc llx14(long a, vbc *p) { return __builtin_vec_lvlx (a,p); } 45 vsc llx15(long a, vsc *p) { return __builtin_vec_lvlx (a,p); } 46 vsc llx16(long a, sc *p) { return __builtin_vec_lvlx (a,p); } 47 vuc llx17(long a, vuc *p) { return __builtin_vec_lvlx (a,p); } 48 vuc llx18(long a, uc *p) { return __builtin_vec_lvlx (a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "lvlxl" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 vsc lc2(long a, void *p) { return __builtin_altivec_lvlxl (a,p); } 31 vsf llxl01(long a, vsf *p) { return __builtin_vec_lvlxl (a,p); } 32 vsf llxl02(long a, sf *p) { return __builtin_vec_lvlxl (a,p); } 33 vbi llxl03(long a, vbi *p) { return __builtin_vec_lvlxl (a,p); } 34 vsi llxl04(long a, vsi *p) { return __builtin_vec_lvlxl (a,p); } 35 vsi llxl05(long a, si *p) { return __builtin_vec_lvlxl (a,p); } 36 vui llxl06(long a, vui *p) { return __builtin_vec_lvlxl (a,p); } 37 vui llxl07(long a, ui *p) { return __builtin_vec_lvlxl (a,p); } 38 vbs llxl08(long a, vbs *p) { return __builtin_vec_lvlxl (a,p); } 39 vp llxl09(long a, vp *p) { return __builtin_vec_lvlxl (a,p); } 40 vss llxl10(long a, vss *p) { return __builtin_vec_lvlxl (a,p); } 41 vss llxl11(long a, ss *p) { return __builtin_vec_lvlxl (a,p); } 42 vus llxl12(long a, vus *p) { return __builtin_vec_lvlxl (a,p); } 43 vus llxl13(long a, us *p) { return __builtin_vec_lvlxl (a,p); } 44 vbc llxl14(long a, vbc *p) { return __builtin_vec_lvlxl (a,p); } 45 vsc llxl15(long a, vsc *p) { return __builtin_vec_lvlxl (a,p); } 46 vsc llxl16(long a, sc *p) { return __builtin_vec_lvlxl (a,p); } 47 vuc llxl17(long a, vuc *p) { return __builtin_vec_lvlxl (a,p); } 48 vuc llxl18(long a, uc *p) { return __builtin_vec_lvlxl (a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "lvrx" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 vsc lc3(long a, void *p) { return __builtin_altivec_lvrx (a,p); } 31 vsf lrx01(long a, vsf *p) { return __builtin_vec_lvrx (a,p); } 32 vsf lrx02(long a, sf *p) { return __builtin_vec_lvrx (a,p); } 33 vbi lrx03(long a, vbi *p) { return __builtin_vec_lvrx (a,p); } 34 vsi lrx04(long a, vsi *p) { return __builtin_vec_lvrx (a,p); } 35 vsi lrx05(long a, si *p) { return __builtin_vec_lvrx (a,p); } 36 vui lrx06(long a, vui *p) { return __builtin_vec_lvrx (a,p); } 37 vui lrx07(long a, ui *p) { return __builtin_vec_lvrx (a,p); } 38 vbs lrx08(long a, vbs *p) { return __builtin_vec_lvrx (a,p); } 39 vp lrx09(long a, vp *p) { return __builtin_vec_lvrx (a,p); } 40 vss lrx10(long a, vss *p) { return __builtin_vec_lvrx (a,p); } 41 vss lrx11(long a, ss *p) { return __builtin_vec_lvrx (a,p); } 42 vus lrx12(long a, vus *p) { return __builtin_vec_lvrx (a,p); } 43 vus lrx13(long a, us *p) { return __builtin_vec_lvrx (a,p); } 44 vbc lrx14(long a, vbc *p) { return __builtin_vec_lvrx (a,p); } 45 vsc lrx15(long a, vsc *p) { return __builtin_vec_lvrx (a,p); } 46 vsc lrx16(long a, sc *p) { return __builtin_vec_lvrx (a,p); } 47 vuc lrx17(long a, vuc *p) { return __builtin_vec_lvrx (a,p); } 48 vuc lrx18(long a, uc *p) { return __builtin_vec_lvrx (a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "lvrxl" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 vsc lc4(long a, void *p) { return __builtin_altivec_lvrxl (a,p); } 31 vsf lrxl01(long a, vsf *p) { return __builtin_vec_lvrxl (a,p); } 32 vsf lrxl02(long a, sf *p) { return __builtin_vec_lvrxl (a,p); } 33 vbi lrxl03(long a, vbi *p) { return __builtin_vec_lvrxl (a,p); } 34 vsi lrxl04(long a, vsi *p) { return __builtin_vec_lvrxl (a,p); } 35 vsi lrxl05(long a, si *p) { return __builtin_vec_lvrxl (a,p); } 36 vui lrxl06(long a, vui *p) { return __builtin_vec_lvrxl (a,p); } 37 vui lrxl07(long a, ui *p) { return __builtin_vec_lvrxl (a,p); } 38 vbs lrxl08(long a, vbs *p) { return __builtin_vec_lvrxl (a,p); } 39 vp lrxl09(long a, vp *p) { return __builtin_vec_lvrxl (a,p); } 40 vss lrxl10(long a, vss *p) { return __builtin_vec_lvrxl (a,p); } 41 vss lrxl11(long a, ss *p) { return __builtin_vec_lvrxl (a,p); } 42 vus lrxl12(long a, vus *p) { return __builtin_vec_lvrxl (a,p); } 43 vus lrxl13(long a, us *p) { return __builtin_vec_lvrxl (a,p); } 44 vbc lrxl14(long a, vbc *p) { return __builtin_vec_lvrxl (a,p); } 45 vsc lrxl15(long a, vsc *p) { return __builtin_vec_lvrxl (a,p); } 46 vsc lrxl16(long a, sc *p) { return __builtin_vec_lvrxl (a,p); } 47 vuc lrxl17(long a, vuc *p) { return __builtin_vec_lvrxl (a,p); } 48 vuc lrxl18(long a, uc *p) { return __builtin_vec_lvrxl (a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "stvlx" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 void sc1(vsc v, long a, void *p) { __builtin_altivec_stvlx (v,a,p); } 31 void slx01(vsf v, long a, vsf *p) { __builtin_vec_stvlx (v,a,p); } 32 void slx02(vsf v, long a, sf *p) { __builtin_vec_stvlx (v,a,p); } 33 void slx03(vbi v, long a, vbi *p) { __builtin_vec_stvlx (v,a,p); } 34 void slx04(vsi v, long a, vsi *p) { __builtin_vec_stvlx (v,a,p); } 35 void slx05(vsi v, long a, si *p) { __builtin_vec_stvlx (v,a,p); } 36 void slx06(vui v, long a, vui *p) { __builtin_vec_stvlx (v,a,p); } 37 void slx07(vui v, long a, ui *p) { __builtin_vec_stvlx (v,a,p); } 38 void slx08(vbs v, long a, vbs *p) { __builtin_vec_stvlx (v,a,p); } 39 void slx09(vp v, long a, vp *p) { __builtin_vec_stvlx (v,a,p); } 40 void slx10(vss v, long a, vss *p) { __builtin_vec_stvlx (v,a,p); } 41 void slx11(vss v, long a, ss *p) { __builtin_vec_stvlx (v,a,p); } 42 void slx12(vus v, long a, vus *p) { __builtin_vec_stvlx (v,a,p); } 43 void slx13(vus v, long a, us *p) { __builtin_vec_stvlx (v,a,p); } 44 void slx14(vbc v, long a, vbc *p) { __builtin_vec_stvlx (v,a,p); } 45 void slx15(vsc v, long a, vsc *p) { __builtin_vec_stvlx (v,a,p); } 46 void slx16(vsc v, long a, sc *p) { __builtin_vec_stvlx (v,a,p); } 47 void slx17(vuc v, long a, vuc *p) { __builtin_vec_stvlx (v,a,p); } 48 void slx18(vuc v, long a, uc *p) { __builtin_vec_stvlx (v,a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "stvlxl" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 void sc2(vsc v, long a, void *p) { __builtin_altivec_stvlxl (v,a,p); } 31 void slxl01(vsf v, long a, vsf *p) { __builtin_vec_stvlxl (v,a,p); } 32 void slxl02(vsf v, long a, sf *p) { __builtin_vec_stvlxl (v,a,p); } 33 void slxl03(vbi v, long a, vbi *p) { __builtin_vec_stvlxl (v,a,p); } 34 void slxl04(vsi v, long a, vsi *p) { __builtin_vec_stvlxl (v,a,p); } 35 void slxl05(vsi v, long a, si *p) { __builtin_vec_stvlxl (v,a,p); } 36 void slxl06(vui v, long a, vui *p) { __builtin_vec_stvlxl (v,a,p); } 37 void slxl07(vui v, long a, ui *p) { __builtin_vec_stvlxl (v,a,p); } 38 void slxl08(vbs v, long a, vbs *p) { __builtin_vec_stvlxl (v,a,p); } 39 void slxl09(vp v, long a, vp *p) { __builtin_vec_stvlxl (v,a,p); } 40 void slxl10(vss v, long a, vss *p) { __builtin_vec_stvlxl (v,a,p); } 41 void slxl11(vss v, long a, ss *p) { __builtin_vec_stvlxl (v,a,p); } 42 void slxl12(vus v, long a, vus *p) { __builtin_vec_stvlxl (v,a,p); } 43 void slxl13(vus v, long a, us *p) { __builtin_vec_stvlxl (v,a,p); } 44 void slxl14(vbc v, long a, vbc *p) { __builtin_vec_stvlxl (v,a,p); } 45 void slxl15(vsc v, long a, vsc *p) { __builtin_vec_stvlxl (v,a,p); } 46 void slxl16(vsc v, long a, sc *p) { __builtin_vec_stvlxl (v,a,p); } 47 void slxl17(vuc v, long a, vuc *p) { __builtin_vec_stvlxl (v,a,p); } 48 void slxl18(vuc v, long a, uc *p) { __builtin_vec_stvlxl (v,a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "stvrx" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 void sc3(vsc v, long a, void *p) { __builtin_altivec_stvrx (v,a,p); } 31 void srx01(vsf v, long a, vsf *p) { __builtin_vec_stvrx (v,a,p); } 32 void srx02(vsf v, long a, sf *p) { __builtin_vec_stvrx (v,a,p); } 33 void srx03(vbi v, long a, vbi *p) { __builtin_vec_stvrx (v,a,p); } 34 void srx04(vsi v, long a, vsi *p) { __builtin_vec_stvrx (v,a,p); } 35 void srx05(vsi v, long a, si *p) { __builtin_vec_stvrx (v,a,p); } 36 void srx06(vui v, long a, vui *p) { __builtin_vec_stvrx (v,a,p); } 37 void srx07(vui v, long a, ui *p) { __builtin_vec_stvrx (v,a,p); } 38 void srx08(vbs v, long a, vbs *p) { __builtin_vec_stvrx (v,a,p); } 39 void srx09(vp v, long a, vp *p) { __builtin_vec_stvrx (v,a,p); } 40 void srx10(vss v, long a, vss *p) { __builtin_vec_stvrx (v,a,p); } 41 void srx11(vss v, long a, ss *p) { __builtin_vec_stvrx (v,a,p); } 42 void srx12(vus v, long a, vus *p) { __builtin_vec_stvrx (v,a,p); } 43 void srx13(vus v, long a, us *p) { __builtin_vec_stvrx (v,a,p); } 44 void srx14(vbc v, long a, vbc *p) { __builtin_vec_stvrx (v,a,p); } 45 void srx15(vsc v, long a, vsc *p) { __builtin_vec_stvrx (v,a,p); } 46 void srx16(vsc v, long a, sc *p) { __builtin_vec_stvrx (v,a,p); } 47 void srx17(vuc v, long a, vuc *p) { __builtin_vec_stvrx (v,a,p); } 48 void srx18(vuc v, long a, uc *p) { __builtin_vec_stvrx (v,a,p); } -
gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_altivec_ok } */ 4 /* { dg-options "-O2 -maltivec -mcpu=cell" } */ 5 /* { dg-final { scan-assembler-times "stvrxl" 19 } } */ 6 7 #include <altivec.h> 8 9 typedef __vector signed char vsc; 10 typedef __vector signed short vss; 11 typedef __vector signed int vsi; 12 typedef __vector unsigned char vuc; 13 typedef __vector unsigned short vus; 14 typedef __vector unsigned int vui; 15 typedef __vector bool char vbc; 16 typedef __vector bool short vbs; 17 typedef __vector bool int vbi; 18 typedef __vector float vsf; 19 typedef __vector pixel vp; 20 typedef signed char sc; 21 typedef signed short ss; 22 typedef signed int si; 23 typedef signed long sl; 24 typedef unsigned char uc; 25 typedef unsigned short us; 26 typedef unsigned int ui; 27 typedef unsigned long ul; 28 typedef float sf; 29 30 void sc4(vsc v, long a, void *p) { __builtin_altivec_stvrxl (v,a,p); } 31 void srxl01(vsf v, long a, vsf *p) { __builtin_vec_stvrxl (v,a,p); } 32 void srxl02(vsf v, long a, sf *p) { __builtin_vec_stvrxl (v,a,p); } 33 void srxl03(vbi v, long a, vbi *p) { __builtin_vec_stvrxl (v,a,p); } 34 void srxl04(vsi v, long a, vsi *p) { __builtin_vec_stvrxl (v,a,p); } 35 void srxl05(vsi v, long a, si *p) { __builtin_vec_stvrxl (v,a,p); } 36 void srxl06(vui v, long a, vui *p) { __builtin_vec_stvrxl (v,a,p); } 37 void srxl07(vui v, long a, ui *p) { __builtin_vec_stvrxl (v,a,p); } 38 void srxl08(vbs v, long a, vbs *p) { __builtin_vec_stvrxl (v,a,p); } 39 void srxl09(vp v, long a, vp *p) { __builtin_vec_stvrxl (v,a,p); } 40 void srxl10(vss v, long a, vss *p) { __builtin_vec_stvrxl (v,a,p); } 41 void srxl11(vss v, long a, ss *p) { __builtin_vec_stvrxl (v,a,p); } 42 void srxl12(vus v, long a, vus *p) { __builtin_vec_stvrxl (v,a,p); } 43 void srxl13(vus v, long a, us *p) { __builtin_vec_stvrxl (v,a,p); } 44 void srxl14(vbc v, long a, vbc *p) { __builtin_vec_stvrxl (v,a,p); } 45 void srxl15(vsc v, long a, vsc *p) { __builtin_vec_stvrxl (v,a,p); } 46 void srxl16(vsc v, long a, sc *p) { __builtin_vec_stvrxl (v,a,p); } 47 void srxl17(vuc v, long a, vuc *p) { __builtin_vec_stvrxl (v,a,p); } 48 void srxl18(vuc v, long a, uc *p) { __builtin_vec_stvrxl (v,a,p); } -
gcc/testsuite/gcc.target/powerpc/pr52457.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/pr52457.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/pr52457.c
old new 1 /* { dg-do run { target { powerpc*-*-linux* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ 4 /* { dg-require-effective-target vsx_hw } */ 5 /* { dg-options "-O1 -mcpu=power7" } */ 6 7 extern void abort (void); 8 9 typedef long long T; 10 typedef T vl_t __attribute__((vector_size(2 * sizeof (T)))); 11 12 vl_t 13 buggy_func (T x) 14 { 15 vl_t w; 16 T *p = (T *)&w; 17 p[0] = p[1] = x; 18 return w; 19 } 20 21 int 22 main(void) 23 { 24 vl_t rval; 25 T *pl; 26 27 pl = (T *) &rval; 28 rval = buggy_func (2); 29 30 if (pl[0] != 2 || pl[1] != 2) 31 abort (); 32 33 return 0; 34 } -
gcc/testsuite/gcc.target/powerpc/pr52775.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/pr52775.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/pr52775.c
old new 1 /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-options "-O1 -mcpu=power4" } */ 4 /* { dg-final { scan-assembler-times "fcfid" 2 } } */ 5 6 double 7 int_to_double (int *p) 8 { 9 return (double)*p; 10 } 11 12 double 13 long_long_to_double (long long *p) 14 { 15 return (double)*p; 16 } -
gcc/testsuite/gcc.target/powerpc/pr53199.c
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gcc.target/powerpc/pr53199.c gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/pr53199.c
old new 1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-options "-O2 -mcpu=power6 -mavoid-indexed-addresses" } */ 4 /* { dg-final { scan-assembler-times "lwbrx" 6 } } */ 5 /* { dg-final { scan-assembler-times "stwbrx" 6 } } */ 6 7 /* PR 51399: bswap gets an error if -mavoid-indexed-addresses was used in 8 creating the two lwbrx instructions. */ 9 10 long long 11 load64_reverse_1 (long long *p) 12 { 13 return __builtin_bswap64 (*p); 14 } 15 16 long long 17 load64_reverse_2 (long long *p) 18 { 19 return __builtin_bswap64 (p[1]); 20 } 21 22 long long 23 load64_reverse_3 (long long *p, int i) 24 { 25 return __builtin_bswap64 (p[i]); 26 } 27 28 void 29 store64_reverse_1 (long long *p, long long x) 30 { 31 *p = __builtin_bswap64 (x); 32 } 33 34 void 35 store64_reverse_2 (long long *p, long long x) 36 { 37 p[1] = __builtin_bswap64 (x); 38 } 39 40 void 41 store64_reverse_3 (long long *p, long long x, int i) 42 { 43 p[i] = __builtin_bswap64 (x); 44 } 45 46 long long 47 reg_reverse (long long x) 48 { 49 return __builtin_bswap64 (x); 50 } -
gcc/testsuite/gfortran.dg/init_flag_10.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/init_flag_10.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/init_flag_10.f90
old new 1 ! { dg-do run } 2 ! { dg-options "-finit-real=NAN" } 3 ! { dg-add-options ieee } 4 ! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } 5 ! 6 ! PR fortran/50619 7 ! 8 ! Contributed by Fred Krogh 9 ! 10 ! The NaN initialization used to set the associate name to NaN! 11 ! 12 13 module testa2 14 type, public :: test_ty 15 real :: rmult = 1.0e0 16 end type test_ty 17 18 contains 19 subroutine test(e, var1) 20 type(test_ty) :: e 21 real :: var1, var2 ! Should get NaN initialized 22 23 ! Should be the default value 24 if (e%rmult /= 1.0) call abort () 25 26 ! Check that NaN initialization is really turned on 27 if (var1 == var1) call abort () 28 if (var2 == var2) call abort () 29 30 ! The following was failing: 31 associate (rmult=>e%rmult) 32 if (e%rmult /= 1.0) call abort () 33 end associate 34 end subroutine test 35 end module testa2 36 37 program testa1 38 use testa2 39 type(test_ty) :: e 40 real :: var1 ! Should get NaN initialized 41 call test(e, var1) 42 stop 43 end program testa1 -
gcc/testsuite/gfortran.dg/intrinsic_8.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/intrinsic_8.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/intrinsic_8.f90
old new 1 ! { dg-do compile } 2 ! 3 ! PR fortran/52452 4 ! 5 ! Contributed by Roger Ferrer Ibanez 6 ! 7 PROGRAM test_etime 8 IMPLICIT NONE 9 INTRINSIC :: etime 10 REAL(4) :: tarray(1:2) 11 REAL(4) :: result 12 13 CALL etime(tarray, result) 14 END PROGRAM test_etime 15 16 subroutine test_etime2 17 IMPLICIT NONE 18 INTRINSIC :: etime 19 REAL(4) :: tarray(1:2) 20 REAL(4) :: result 21 22 result = etime(tarray) 23 END subroutine test_etime2 -
gcc/testsuite/gfortran.dg/optional_absent_2.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/optional_absent_2.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/optional_absent_2.f90
old new 1 ! { dg-do run } 2 ! 3 ! PR fortran/51758 4 ! 5 ! Contributed by Mikael Morin 6 ! 7 ! Check whether passing NULL() to an elemental procedure works, 8 ! where NULL() denotes an absent optional argument. 9 ! 10 program p 11 12 integer :: a(2) 13 integer :: b 14 15 a = 0 16 a = foo((/ 1, 1 /), null()) 17 ! print *, a 18 if (any(a /= 2)) call abort 19 20 a = 0 21 a = bar((/ 1, 1 /), null()) 22 ! print *, a 23 if (any(a /= 2)) call abort 24 25 b = 0 26 b = bar(1, null()) 27 ! print *, b 28 if (b /= 2) call abort 29 30 contains 31 32 function foo(a, b) 33 integer :: a(:) 34 integer, optional :: b(:) 35 integer :: foo(size(a)) 36 37 if (present(b)) call abort 38 39 foo = 2 40 end function foo 41 42 elemental function bar(a, b) 43 integer, intent(in) :: a 44 integer, intent(in), optional :: b 45 integer :: bar 46 47 bar = 2 48 49 if (present(b)) bar = 1 50 51 end function bar 52 53 end program p -
gcc/testsuite/gfortran.dg/pointer_intent_6.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/pointer_intent_6.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/pointer_intent_6.f90
old new 1 ! { dg-do compile } 2 ! 3 ! PR fortran/52864 4 ! 5 ! Assigning to an intent(in) pointer (which is valid). 6 ! 7 program test 8 type PoisFFT_Solver3D 9 complex, dimension(:,:,:), & 10 pointer :: work => null() 11 end type PoisFFT_Solver3D 12 contains 13 subroutine PoisFFT_Solver3D_FullPeriodic(D, p) 14 type(PoisFFT_Solver3D), intent(in) :: D 15 real, intent(in), pointer :: p(:) 16 D%work(i,j,k) = 0.0 17 p = 0.0 18 end subroutine 19 end -
gcc/testsuite/gfortran.dg/proc_ptr_34.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/proc_ptr_34.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/proc_ptr_34.f90
old new 1 ! { dg-do compile } 2 ! 3 ! PR fortran/52469 4 ! 5 ! This was failing as the DECL of the proc pointer "func" 6 ! was used for the interface of the proc-pointer component "my_f_ptr" 7 ! rather than the decl of the proc-pointer target 8 ! 9 ! Contributed by palott@gmail.com 10 ! 11 12 module ExampleFuncs 13 implicit none 14 15 ! NOTE: "func" is a procedure pointer! 16 pointer :: func 17 interface 18 function func (z) 19 real :: func 20 real, intent (in) :: z 21 end function func 22 end interface 23 24 type Contains_f_ptr 25 procedure (func), pointer, nopass :: my_f_ptr 26 end type Contains_f_ptr 27 contains 28 29 function f1 (x) 30 real :: f1 31 real, intent (in) :: x 32 33 f1 = 2.0 * x 34 35 return 36 end function f1 37 38 function f2 (x) 39 real :: f2 40 real, intent (in) :: x 41 42 f2 = 3.0 * x**2 43 44 return 45 end function f2 46 47 function fancy (func, x) 48 real :: fancy 49 real, intent (in) :: x 50 51 interface AFunc 52 function func (y) 53 real :: func 54 real, intent (in) ::y 55 end function func 56 end interface AFunc 57 58 fancy = func (x) + 3.3 * x 59 end function fancy 60 61 end module ExampleFuncs 62 63 64 program test_proc_ptr 65 use ExampleFuncs 66 implicit none 67 68 type (Contains_f_ptr), dimension (2) :: NewType 69 70 !NewType(1) % my_f_ptr => f1 71 NewType(2) % my_f_ptr => f2 72 73 !write (*, *) NewType(1) % my_f_ptr (3.0), NewType(2) % my_f_ptr (3.0) 74 write (6, *) NewType(2) % my_f_ptr (3.0) ! < Shall print '27.0' 75 76 stop 77 end program test_proc_ptr 78 79 ! { dg-final { cleanup-modules "examplefuncs" } } -
gcc/testsuite/gfortran.dg/realloc_on_assign_15.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/realloc_on_assign_15.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/realloc_on_assign_15.f90
old new 1 ! { dg-do run } 2 ! 3 ! PR fortran/53389 4 ! 5 ! The program was leaking memory before due to 6 ! realloc on assignment and nested functions. 7 ! 8 module foo 9 implicit none 10 contains 11 12 function filler(array, val) 13 real, dimension(:), intent(in):: array 14 real, dimension(size(array)):: filler 15 real, intent(in):: val 16 17 filler=val 18 19 end function filler 20 end module 21 22 program test 23 use foo 24 implicit none 25 26 real, dimension(:), allocatable:: x, y 27 integer, parameter:: N=1000 !*1000 28 integer:: i 29 30 ! allocate( x(N) ) 31 allocate( y(N) ) 32 y=0.0 33 34 do i=1, N 35 ! print *,i 36 x=filler(filler(y, real(2*i)), real(i)) 37 y=y+x 38 end do 39 40 end program test -
gcc/testsuite/gfortran.dg/save_4.f90
diff -Naur gcc-4.6.3.orig/gcc/testsuite/gfortran.dg/save_4.f90 gcc-4.6.3/gcc/testsuite/gfortran.dg/save_4.f90
old new 1 ! { dg-do compile } 2 ! { dg-options "-std=f2003" } 3 ! 4 ! PR fortran/53597 5 ! 6 MODULE somemodule 7 IMPLICIT NONE 8 TYPE sometype 9 INTEGER :: i 10 DOUBLE PRECISION, POINTER, DIMENSION(:,:) :: coef => NULL() 11 END TYPE sometype 12 TYPE(sometype) :: somevariable ! { dg-error "Fortran 2008: Implied SAVE for module variable 'somevariable' at .1., needed due to the default initialization" } 13 END MODULE somemodule -
gcc/testsuite/lib/target-supports.exp
diff -Naur gcc-4.6.3.orig/gcc/testsuite/lib/target-supports.exp gcc-4.6.3/gcc/testsuite/lib/target-supports.exp
old new 2976 2976 return $et_natural_alignment_64_saved 2977 2977 } 2978 2978 2979 # Return 1 if all vector types are naturally aligned (aligned to their 2980 # type-size), 0 otherwise. 2981 # 2982 # This won't change for different subtargets so cache the result. 2983 2984 proc check_effective_target_vect_natural_alignment { } { 2985 global et_vect_natural_alignment 2986 2987 if [info exists et_vect_natural_alignment_saved] { 2988 verbose "check_effective_target_vect_natural_alignment: using cached result" 2 2989 } else { 2990 set et_vect_natural_alignment_saved 1 2991 if { [check_effective_target_arm_eabi] } { 2992 set et_vect_natural_alignment_saved 0 2993 } 2994 } 2995 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2 2996 return $et_vect_natural_alignment_saved 2997 } 2998 2979 2999 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise. 2980 3000 # 2981 3001 # This won't change for different subtargets so cache the result. -
gcc/toplev.c
diff -Naur gcc-4.6.3.orig/gcc/toplev.c gcc-4.6.3/gcc/toplev.c
old new 1326 1326 "and -ftree-loop-linear)"); 1327 1327 #endif 1328 1328 1329 if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2)) 1330 { 1331 warning (0, "-fstrict-volatile-bitfields disabled; " 1332 "it is incompatible with ABI versions < 2"); 1333 flag_strict_volatile_bitfields = 0; 1334 } 1335 1329 1336 /* Unrolling all loops implies that standard loop unrolling must also 1330 1337 be done. */ 1331 1338 if (flag_unroll_all_loops) -
gcc/tree-inline.c
diff -Naur gcc-4.6.3.orig/gcc/tree-inline.c gcc-4.6.3/gcc/tree-inline.c
old new 4947 4947 if ((e = cgraph_edge (id->dst_node, gsi_stmt (bsi))) != NULL) 4948 4948 { 4949 4949 if (!e->inline_failed) 4950 cgraph_remove_node_and_inline_clones (e->callee );4950 cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); 4951 4951 else 4952 4952 cgraph_remove_edge (e); 4953 4953 } … … 4957 4957 { 4958 4958 if ((e = cgraph_edge (node, gsi_stmt (bsi))) != NULL) 4959 4959 { 4960 if (!e->inline_failed )4961 cgraph_remove_node_and_inline_clones (e->callee );4960 if (!e->inline_failed && e->callee != id->src_node) 4961 cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); 4962 4962 else 4963 4963 cgraph_remove_edge (e); 4964 4964 } -
gcc/tree-pretty-print.c
diff -Naur gcc-4.6.3.orig/gcc/tree-pretty-print.c gcc-4.6.3/gcc/tree-pretty-print.c
old new 805 805 infer them and MEM_ATTR caching will share MEM_REFs 806 806 with differently-typed op0s. */ 807 807 && TREE_CODE (TREE_OPERAND (node, 0)) != INTEGER_CST 808 /* Released SSA_NAMES have no TREE_TYPE. */ 809 && TREE_TYPE (TREE_OPERAND (node, 0)) != NULL_TREE 808 810 /* Same pointer types, but ignoring POINTER_TYPE vs. 809 811 REFERENCE_TYPE. */ 810 812 && (TREE_TYPE (TREE_TYPE (TREE_OPERAND (node, 0))) … … 1171 1173 can't infer them and MEM_ATTR caching will share 1172 1174 MEM_REFs with differently-typed op0s. */ 1173 1175 && TREE_CODE (TREE_OPERAND (op0, 0)) != INTEGER_CST 1176 /* Released SSA_NAMES have no TREE_TYPE. */ 1177 && TREE_TYPE (TREE_OPERAND (op0, 0)) != NULL_TREE 1174 1178 /* Same pointer types, but ignoring POINTER_TYPE vs. 1175 1179 REFERENCE_TYPE. */ 1176 1180 && (TREE_TYPE (TREE_TYPE (TREE_OPERAND (op0, 0))) -
gcc/tree-sra.c
diff -Naur gcc-4.6.3.orig/gcc/tree-sra.c gcc-4.6.3/gcc/tree-sra.c
old new 2937 2937 } 2938 2938 else 2939 2939 { 2940 if (access_has_children_p (lacc) && access_has_children_p (racc)) 2940 if (access_has_children_p (lacc) 2941 && access_has_children_p (racc) 2942 /* When an access represents an unscalarizable region, it usually 2943 represents accesses with variable offset and thus must not be used 2944 to generate new memory accesses. */ 2945 && !lacc->grp_unscalarizable_region 2946 && !racc->grp_unscalarizable_region) 2941 2947 { 2942 2948 gimple_stmt_iterator orig_gsi = *gsi; 2943 2949 enum unscalarized_data_handling refreshed; -
gcc/tree-ssa-ccp.c
diff -Naur gcc-4.6.3.orig/gcc/tree-ssa-ccp.c gcc-4.6.3/gcc/tree-ssa-ccp.c
old new 1364 1364 if (!DECL_INITIAL (base) 1365 1365 && (TREE_STATIC (base) || DECL_EXTERNAL (base))) 1366 1366 return error_mark_node; 1367 /* Do not return an error_mark_node DECL_INITIAL. LTO uses this 1368 as special marker (_not_ zero ...) for its own purposes. */ 1369 if (DECL_INITIAL (base) == error_mark_node) 1370 return NULL_TREE; 1367 1371 return DECL_INITIAL (base); 1368 1372 1369 1373 case ARRAY_REF: -
gcc/tree-vect-data-refs.c
diff -Naur gcc-4.6.3.orig/gcc/tree-vect-data-refs.c gcc-4.6.3/gcc/tree-vect-data-refs.c
old new 1019 1019 int misal = DR_MISALIGNMENT (dr); 1020 1020 tree vectype = STMT_VINFO_VECTYPE (stmt_info); 1021 1021 misal += negative ? -npeel * dr_size : npeel * dr_size; 1022 misal &= GET_MODE_SIZE (TYPE_MODE (vectype)) - 1;1022 misal &= (TYPE_ALIGN (vectype) / BITS_PER_UNIT) - 1; 1023 1023 SET_DR_MISALIGNMENT (dr, misal); 1024 1024 return; 1025 1025 } -
gcc/tree-vect-loop-manip.c
diff -Naur gcc-4.6.3.orig/gcc/tree-vect-loop-manip.c gcc-4.6.3/gcc/tree-vect-loop-manip.c
old new 2008 2008 If the misalignment of DR is known at compile time: 2009 2009 addr_mis = int mis = DR_MISALIGNMENT (dr); 2010 2010 Else, compute address misalignment in bytes: 2011 addr_mis = addr & (vectype_ size- 1)2011 addr_mis = addr & (vectype_align - 1) 2012 2012 2013 2013 prolog_niters = min (LOOP_NITERS, ((VF - addr_mis/elem_size)&(VF-1))/step) 2014 2014 … … 2065 2065 tree ptr_type = TREE_TYPE (start_addr); 2066 2066 tree size = TYPE_SIZE (ptr_type); 2067 2067 tree type = lang_hooks.types.type_for_size (tree_low_cst (size, 1), 1); 2068 tree vectype_size_minus_1 = build_int_cst (type, vectype_align - 1); 2069 tree elem_size_log = 2070 build_int_cst (type, exact_log2 (vectype_align/nelements)); 2068 tree vectype_align_minus_1 = build_int_cst (type, vectype_align - 1); 2069 HOST_WIDE_INT elem_size = 2070 int_cst_value (TYPE_SIZE_UNIT (TREE_TYPE (vectype))); 2071 tree elem_size_log = build_int_cst (type, exact_log2 (elem_size)); 2071 2072 tree nelements_minus_1 = build_int_cst (type, nelements - 1); 2072 2073 tree nelements_tree = build_int_cst (type, nelements); 2073 2074 tree byte_misalign; … … 2076 2077 new_bb = gsi_insert_seq_on_edge_immediate (pe, new_stmts); 2077 2078 gcc_assert (!new_bb); 2078 2079 2079 /* Create: byte_misalign = addr & (vectype_ size- 1) */2080 /* Create: byte_misalign = addr & (vectype_align - 1) */ 2080 2081 byte_misalign = 2081 2082 fold_build2 (BIT_AND_EXPR, type, fold_convert (type, start_addr), 2082 vectype_ size_minus_1);2083 vectype_align_minus_1); 2083 2084 2084 2085 /* Create: elem_misalign = byte_misalign / element_size */ 2085 2086 elem_misalign = -
gcc/tree-vect-loop.c
diff -Naur gcc-4.6.3.orig/gcc/tree-vect-loop.c gcc-4.6.3/gcc/tree-vect-loop.c
old new 2104 2104 if (stmt_info 2105 2105 && !STMT_VINFO_RELEVANT_P (stmt_info) 2106 2106 && (!STMT_VINFO_LIVE_P (stmt_info) 2107 || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def)) 2107 || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info))) 2108 && !STMT_VINFO_IN_PATTERN_P (stmt_info)) 2108 2109 continue; 2109 2110 2110 2111 if (STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt))) … … 2251 2252 { 2252 2253 gimple stmt = gsi_stmt (si); 2253 2254 stmt_vec_info stmt_info = vinfo_for_stmt (stmt); 2255 2256 if (STMT_VINFO_IN_PATTERN_P (stmt_info)) 2257 { 2258 stmt = STMT_VINFO_RELATED_STMT (stmt_info); 2259 stmt_info = vinfo_for_stmt (stmt); 2260 } 2261 2254 2262 /* Skip stmts that are not vectorized inside the loop. */ 2255 2263 if (!STMT_VINFO_RELEVANT_P (stmt_info) 2256 2264 && (!STMT_VINFO_LIVE_P (stmt_info) 2257 || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def))2265 || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info)))) 2258 2266 continue; 2267 2259 2268 vec_inside_cost += STMT_VINFO_INSIDE_OF_LOOP_COST (stmt_info) * factor; 2260 2269 /* FIXME: for stmts in the inner-loop in outer-loop vectorization, 2261 2270 some of the "outside" costs are generated inside the outer-loop. */ -
gcc/tree-vect-stmts.c
diff -Naur gcc-4.6.3.orig/gcc/tree-vect-stmts.c gcc-4.6.3/gcc/tree-vect-stmts.c
old new 623 623 } 624 624 625 625 626 /* Model cost for type demotion and promotion operations. PWR is normally 627 zero for single-step promotions and demotions. It will be one if 628 two-step promotion/demotion is required, and so on. Each additional 629 step doubles the number of instructions required. */ 630 631 static void 632 vect_model_promotion_demotion_cost (stmt_vec_info stmt_info, 633 enum vect_def_type *dt, int pwr) 634 { 635 int i, tmp; 636 int inside_cost = 0, outside_cost = 0, single_stmt_cost; 637 638 /* The SLP costs were already calculated during SLP tree build. */ 639 if (PURE_SLP_STMT (stmt_info)) 640 return; 641 642 single_stmt_cost = vect_get_stmt_cost (vec_promote_demote); 643 for (i = 0; i < pwr + 1; i++) 644 { 645 tmp = (STMT_VINFO_TYPE (stmt_info) == type_promotion_vec_info_type) ? 646 (i + 1) : i; 647 inside_cost += vect_pow2 (tmp) * single_stmt_cost; 648 } 649 650 /* FORNOW: Assuming maximum 2 args per stmts. */ 651 for (i = 0; i < 2; i++) 652 { 653 if (dt[i] == vect_constant_def || dt[i] == vect_external_def) 654 outside_cost += vect_get_stmt_cost (vector_stmt); 655 } 656 657 if (vect_print_dump_info (REPORT_COST)) 658 fprintf (vect_dump, "vect_model_promotion_demotion_cost: inside_cost = %d, " 659 "outside_cost = %d .", inside_cost, outside_cost); 660 661 /* Set the costs in STMT_INFO. */ 662 stmt_vinfo_set_inside_of_loop_cost (stmt_info, NULL, inside_cost); 663 stmt_vinfo_set_outside_of_loop_cost (stmt_info, NULL, outside_cost); 664 } 665 626 666 /* Function vect_cost_strided_group_size 627 667 628 668 For strided load or store, return the group_size only if it is the first … … 691 731 { 692 732 /* Uses a high and low interleave operation for each needed permute. */ 693 733 inside_cost = ncopies * exact_log2(group_size) * group_size 694 * vect_get_stmt_cost (vec tor_stmt);734 * vect_get_stmt_cost (vec_perm); 695 735 696 736 if (vect_print_dump_info (REPORT_COST)) 697 737 fprintf (vect_dump, "vect_model_store_cost: strided group_size = %d .", … … 795 835 { 796 836 /* Uses an even and odd extract operations for each needed permute. */ 797 837 inside_cost = ncopies * exact_log2(group_size) * group_size 798 * vect_get_stmt_cost (vec tor_stmt);838 * vect_get_stmt_cost (vec_perm); 799 839 800 840 if (vect_print_dump_info (REPORT_COST)) 801 841 fprintf (vect_dump, "vect_model_load_cost: strided group_size = %d .", … … 855 895 case dr_explicit_realign: 856 896 { 857 897 *inside_cost += ncopies * (2 * vect_get_stmt_cost (vector_load) 858 + vect_get_stmt_cost (vector_stmt));898 + vect_get_stmt_cost (vec_perm)); 859 899 860 900 /* FIXME: If the misalignment remains fixed across the iterations of 861 901 the containing loop, the following cost should be added to the … … 863 903 if (targetm.vectorize.builtin_mask_for_load) 864 904 *inside_cost += vect_get_stmt_cost (vector_stmt); 865 905 906 if (vect_print_dump_info (REPORT_COST)) 907 fprintf (vect_dump, "vect_model_load_cost: explicit realign"); 908 866 909 break; 867 910 } 868 911 case dr_explicit_realign_optimized: … … 886 929 } 887 930 888 931 *inside_cost += ncopies * (vect_get_stmt_cost (vector_load) 889 + vect_get_stmt_cost (vector_stmt)); 932 + vect_get_stmt_cost (vec_perm)); 933 934 if (vect_print_dump_info (REPORT_COST)) 935 fprintf (vect_dump, 936 "vect_model_load_cost: explicit realign optimized"); 937 890 938 break; 891 939 } 892 940 … … 2919 2967 STMT_VINFO_TYPE (stmt_info) = type_demotion_vec_info_type; 2920 2968 if (vect_print_dump_info (REPORT_DETAILS)) 2921 2969 fprintf (vect_dump, "=== vectorizable_demotion ==="); 2922 vect_model_ simple_cost (stmt_info, ncopies, dt, NULL);2970 vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); 2923 2971 return true; 2924 2972 } 2925 2973 … … 3217 3265 STMT_VINFO_TYPE (stmt_info) = type_promotion_vec_info_type; 3218 3266 if (vect_print_dump_info (REPORT_DETAILS)) 3219 3267 fprintf (vect_dump, "=== vectorizable_promotion ==="); 3220 vect_model_ simple_cost (stmt_info, 2*ncopies, dt, NULL);3268 vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); 3221 3269 return true; 3222 3270 } 3223 3271 -
gcc/varasm.c
diff -Naur gcc-4.6.3.orig/gcc/varasm.c gcc-4.6.3/gcc/varasm.c
old new 1 1 /* Output variables, constants and external declarations, for GNU compiler. 2 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 3 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 4 2010, 2011 Free Software Foundation, Inc.4 2010, 2011, 2012 Free Software Foundation, Inc. 5 5 6 6 This file is part of GCC. 7 7 … … 30 30 #include "config.h" 31 31 #include "system.h" 32 32 #include "coretypes.h" 33 #include "pointer-set.h" 33 34 #include "tm.h" 34 35 #include "rtl.h" 35 36 #include "tree.h" … … 2097 2098 it all the way to final. See PR 17982 for further discussion. */ 2098 2099 static GTY(()) tree pending_assemble_externals; 2099 2100 2101 /* FIXME: Trunk is at GCC 4.8 now and the above problem still hasn't been 2102 addressed properly. This caused PR 52640 due to O(external_decls**2) 2103 lookups in the pending_assemble_externals TREE_LIST in assemble_external. 2104 Paper over with this pointer set, which we use to see if we have already 2105 added a decl to pending_assemble_externals without first traversing 2106 the entire pending_assemble_externals list. See assemble_external(). */ 2107 static struct pointer_set_t *pending_assemble_externals_set; 2108 2109 /* Some targets delay some output to final using TARGET_ASM_FILE_END. 2110 As a result, assemble_external can be called after the list of externals 2111 is processed and the pointer set destroyed. */ 2112 static bool pending_assemble_externals_processed; 2113 2100 2114 #ifdef ASM_OUTPUT_EXTERNAL 2101 2115 /* True if DECL is a function decl for which no out-of-line copy exists. 2102 2116 It is assumed that DECL's assembler name has been set. */ … … 2146 2160 assemble_external_real (TREE_VALUE (list)); 2147 2161 2148 2162 pending_assemble_externals = 0; 2163 pending_assemble_externals_processed = true; 2164 pointer_set_destroy (pending_assemble_externals_set); 2149 2165 #endif 2150 2166 } 2151 2167 … … 2186 2202 weak_decls = tree_cons (NULL, decl, weak_decls); 2187 2203 2188 2204 #ifdef ASM_OUTPUT_EXTERNAL 2189 if (value_member (decl, pending_assemble_externals) == NULL_TREE) 2205 if (pending_assemble_externals_processed) 2206 { 2207 assemble_external_real (decl); 2208 return; 2209 } 2210 2211 if (! pointer_set_insert (pending_assemble_externals_set, decl)) 2190 2212 pending_assemble_externals = tree_cons (NULL, decl, 2191 2213 pending_assemble_externals); 2192 2214 #endif … … 3922 3944 tem = TREE_OPERAND (tem, 0)) 3923 3945 ; 3924 3946 3947 if (TREE_CODE (tem) == MEM_REF 3948 && TREE_CODE (TREE_OPERAND (tem, 0)) == ADDR_EXPR) 3949 { 3950 reloc = compute_reloc_for_constant (TREE_OPERAND (tem, 0)); 3951 break; 3952 } 3953 3925 3954 if (TREE_PUBLIC (tem)) 3926 3955 reloc |= 2; 3927 3956 else … … 3990 4019 3991 4020 if (CONSTANT_CLASS_P (tem) || TREE_CODE (tem) == CONSTRUCTOR) 3992 4021 output_constant_def (tem, 0); 4022 4023 if (TREE_CODE (tem) == MEM_REF) 4024 output_addressed_constants (TREE_OPERAND (tem, 0)); 3993 4025 break; 3994 4026 3995 4027 case PLUS_EXPR: … … 6019 6051 6020 6052 if (readonly_data_section == NULL) 6021 6053 readonly_data_section = text_section; 6054 6055 #ifdef ASM_OUTPUT_EXTERNAL 6056 pending_assemble_externals_set = pointer_set_create (); 6057 #endif 6022 6058 } 6023 6059 6024 6060 enum tls_model -
gcc/version.c
diff -Naur gcc-4.6.3.orig/gcc/version.c gcc-4.6.3/gcc/version.c
old new 33 33 Makefile. */ 34 34 35 35 const char version_string[] = BASEVER DATESTAMP DEVPHASE REVISION; 36 const char pkgversion_string[] = PKGVERSION;36 const char pkgversion_string[] = "(GCC for Cross-LFS 4.6.3.20120825) "; -
libffi/src/powerpc/aix.S
diff -Naur gcc-4.6.3.orig/libffi/src/powerpc/aix.S gcc-4.6.3/libffi/src/powerpc/aix.S
old new 1 1 /* ----------------------------------------------------------------------- 2 aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc.2 aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc. 3 3 based on darwin.S by John Hornkvist 4 4 5 5 PowerPC Assembly glue. … … 79 79 .set f20,20 80 80 .set f21,21 81 81 82 .extern .ffi_prep_args 83 82 84 #define LIBFFI_ASM 83 85 #include <fficonfig.h> 84 86 #include <ffi.h> … … 125 127 /* Call ffi_prep_args. */ 126 128 mr r4, r1 127 129 bl .ffi_prep_args 130 nop 128 131 129 132 /* Now do the call. */ 130 133 ld r0, 0(r29) … … 226 229 /* Call ffi_prep_args. */ 227 230 mr r4, r1 228 231 bl .ffi_prep_args 232 nop 229 233 230 234 /* Now do the call. */ 231 235 lwz r0, 0(r29) -
libffi/src/powerpc/aix_closure.S
diff -Naur gcc-4.6.3.orig/libffi/src/powerpc/aix_closure.S gcc-4.6.3/libffi/src/powerpc/aix_closure.S
old new 79 79 .set f20,20 80 80 .set f21,21 81 81 82 .extern .ffi_closure_helper_DARWIN 83 82 84 #define LIBFFI_ASM 83 85 #define JUMPTARGET(name) name 84 86 #define L(x) x … … 165 167 166 168 /* look up the proper starting point in table */ 167 169 /* by using return type as offset */ 170 lhz r3, 10(r3) /* load type from return type */ 168 171 ld r4, LC..60(2) /* get address of jump table */ 169 172 sldi r3, r3, 4 /* now multiply return type by 16 */ 170 173 ld r0, 240+16(r1) /* load return address */ … … 337 340 338 341 /* look up the proper starting point in table */ 339 342 /* by using return type as offset */ 343 lhz r3, 6(r3) /* load type from return type */ 340 344 lwz r4, LC..60(2) /* get address of jump table */ 341 slwi r3, r3, 4 /* now multiply return type by 4*/345 slwi r3, r3, 4 /* now multiply return type by 16 */ 342 346 lwz r0, 176+8(r1) /* load return address */ 343 347 add r3, r3, r4 /* add contents of table to table address */ 344 348 mtctr r3 -
libgfortran/intrinsics/eoshift2.c
diff -Naur gcc-4.6.3.orig/libgfortran/intrinsics/eoshift2.c gcc-4.6.3/libgfortran/intrinsics/eoshift2.c
old new 77 77 78 78 ret->offset = 0; 79 79 ret->dtype = array->dtype; 80 81 if (arraysize > 0) 82 ret->data = internal_malloc_size (size * arraysize); 83 else 84 ret->data = internal_malloc_size (1); 85 80 86 for (i = 0; i < GFC_DESCRIPTOR_RANK (array); i++) 81 87 { 82 88 index_type ub, str; … … 90 96 * GFC_DESCRIPTOR_STRIDE(ret,i-1); 91 97 92 98 GFC_DIMENSION_SET(ret->dim[i], 0, ub, str); 93 94 if (arraysize > 0)95 ret->data = internal_malloc_size (size * arraysize);96 else97 ret->data = internal_malloc_size (1);98 99 99 } 100 100 } 101 101 else if (unlikely (compile_options.bounds_check)) -
libjava/configure
diff -Naur gcc-4.6.3.orig/libjava/configure gcc-4.6.3/libjava/configure
old new 19775 19775 SYSTEMSPEC="-lunicows $SYSTEMSPEC" 19776 19776 fi 19777 19777 ;; 19778 *-*-darwin 9*)19778 *-*-darwin[912]*) 19779 19779 SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" 19780 19780 ;; 19781 *-*-darwin[12]*)19782 # Something is incompatible with pie, would be nice to fix it and19783 # remove -no_pie. PR4946119784 SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}"19785 ;;19786 19781 *) 19787 19782 SYSTEMSPEC= 19788 19783 ;; -
libjava/configure.ac
diff -Naur gcc-4.6.3.orig/libjava/configure.ac gcc-4.6.3/libjava/configure.ac
old new 886 886 SYSTEMSPEC="-lunicows $SYSTEMSPEC" 887 887 fi 888 888 ;; 889 *-*-darwin 9*)889 *-*-darwin[[912]]*) 890 890 SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" 891 891 ;; 892 *-*-darwin[[12]]*)893 # Something is incompatible with pie, would be nice to fix it and894 # remove -no_pie. PR49461895 SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}"896 ;;897 892 *) 898 893 SYSTEMSPEC= 899 894 ;; -
libquadmath/libquadmath.info
diff -Naur gcc-4.6.3.orig/libquadmath/libquadmath.info gcc-4.6.3/libquadmath/libquadmath.info
old new 1 This is libquadmath.info, produced by makeinfo version 4.13 from2 /d//gcc-4.6.3/gcc-4.6.3/libquadmath/libquadmath.texi.3 4 Copyright (C) 2010 Free Software Foundation, Inc.5 6 Permission is granted to copy, distribute and/or modify this7 document under the terms of the GNU Free Documentation License,8 Version 1.2 or any later version published by the Free Software9 Foundation; with no Invariant Sections, with the Front-Cover Texts10 being "A GNU Manual," and with the Back-Cover Texts as in (a)11 below. A copy of the license is included in the section entitled12 "GNU Free Documentation License."13 14 (a) The FSF's Back-Cover Text is: "You have the freedom to copy15 and modify this GNU manual.16 17 INFO-DIR-SECTION GNU Libraries18 START-INFO-DIR-ENTRY19 * libquadmath: (libquadmath). GCC Quad-Precision Math Library20 END-INFO-DIR-ENTRY21 22 This manual documents the GCC Quad-Precision Math Library API.23 24 Published by the Free Software Foundation 51 Franklin Street, Fifth25 Floor Boston, MA 02110-1301 USA26 27 Copyright (C) 2010 Free Software Foundation, Inc.28 29 Permission is granted to copy, distribute and/or modify this30 document under the terms of the GNU Free Documentation License,31 Version 1.2 or any later version published by the Free Software32 Foundation; with no Invariant Sections, with the Front-Cover Texts33 being "A GNU Manual," and with the Back-Cover Texts as in (a)34 below. A copy of the license is included in the section entitled35 "GNU Free Documentation License."36 37 (a) The FSF's Back-Cover Text is: "You have the freedom to copy38 and modify this GNU manual.39 40 41 File: libquadmath.info, Node: Top, Next: Typedef and constants, Up: (dir)42 43 Introduction44 ************45 46 This manual documents the usage of libquadmath, the GCC Quad-Precision47 Math Library Application Programming Interface (API).48 49 * Menu:50 51 * Typedef and constants:: Defined data types and constants52 * Math Library Routines:: The Libquadmath math runtime application53 programming interface.54 * I/O Library Routines:: The Libquadmath I/O runtime application55 programming interface.56 * GNU Free Documentation License::57 How you can copy and share this manual.58 * Reporting Bugs:: How to report bugs in GCC Libquadmath.59 60 61 File: libquadmath.info, Node: Typedef and constants, Next: Math Library Routines, Prev: Top, Up: Top62 63 1 Typedef and constants64 ***********************65 66 The following data type has been defined via `typedef'.67 68 `__complex128': `__float128'-based complex number69 70 The following macros are defined, which give the numeric limits of71 the `__float128' data type.72 73 `FLT128_MAX': largest finite number74 75 `FLT128_MIN': smallest positive number with full precision76 77 `FLT128_EPSILON': difference between 1 and the next larger78 representable number79 80 `FLT128_DENORM_MIN': smallest positive denormalized number81 82 `FLT128_MANT_DIG': number of digits in the mantissa (bit precision)83 84 `FLT128_MIN_EXP': maximal negative exponent85 86 `FLT128_MAX_EXP': maximal positive exponent87 88 `FLT128_DIG': number of decimal digits in the mantissa89 90 `FLT128_MIN_10_EXP': maximal negative decimal exponent91 92 `FLT128_MAX_10_EXP': maximal positive decimal exponent93 94 The following mathematical constants of type `__float128' are95 defined.96 97 `M_Eq': the constant e (Euler's number)98 99 `M_LOG2Eq': binary logarithm of 2100 101 `M_LOG10Eq': common, decimal logarithm of 2102 103 `M_LN2q': natural logarithm of 2104 105 `M_LN10q': natural logarithm of 10106 107 `M_PIq': pi108 109 `M_PI_2q': two pi110 111 `M_PI_4q': four pi112 113 `M_1_PIq': one over pi114 115 `M_2_PIq': one over two pi116 117 `M_2_SQRTPIq': two over square root of pi118 119 `M_SQRT2q': square root of 2120 121 `M_SQRT1_2q': one over square root of 2122 123 124 File: libquadmath.info, Node: Math Library Routines, Next: I/O Library Routines, Prev: Typedef and constants, Up: Top125 126 2 Math Library Routines127 ***********************128 129 The following mathematical functions are available:130 131 `acosq': arc cosine function132 133 `acoshq': inverse hyperbolic cosine function134 135 `asinq': arc sine function136 137 `asinhq': inverse hyperbolic sine function138 139 `atanq': arc tangent function140 141 `atanhq': inverse hyperbolic tangent function142 143 `atan2q': arc tangent function144 145 `cbrtq': cube root function146 147 `ceilq': ceiling value function148 149 `copysignq': copy sign of a number150 151 `coshq': hyperbolic cosine function152 153 `cosq': cosine function154 155 `erfq': error function156 157 `erfcq': complementary error function158 159 `expq': exponential function160 161 `expm1q': exponential minus 1 function162 163 `fabsq': absolute value function164 165 `fdimq': positive difference function166 167 `finiteq': check finiteness of value168 169 `floorq': floor value function170 171 `fmaq': fused multiply and add172 173 `fmaxq': determine maximum of two values174 175 `fminq': determine minimum of two values176 177 `fmodq': remainder value function178 179 `frexpq': extract mantissa and exponent180 181 `hypotq': Eucledian distance function182 183 `ilogbq': get exponent of the value184 185 `isinfq': check for infinity186 187 `isnanq': check for not a number188 189 `j0q': Bessel function of the first kind, first order190 191 `j1q': Bessel function of the first kind, second order192 193 `jnq': Bessel function of the first kind, N-th order194 195 `ldexpq': load exponent of the value196 197 `lgammaq': logarithmic gamma function198 199 `llrintq': round to nearest integer value200 201 `llroundq': round to nearest integer value away from zero202 203 `logq': natural logarithm function204 205 `log10q': base 10 logarithm function206 207 `log1pq': compute natural logarithm of the value plus one208 209 `log2q': base 2 logarithm function210 211 `lrintq': round to nearest integer value212 213 `lroundq': round to nearest integer value away from zero214 215 `modfq': decompose the floating-point number216 217 `nanq': return quiet NaN218 219 `nearbyintq': round to nearest integer220 221 `nextafterq': next representable floating-point number222 223 `powq': power function224 225 `remainderq': remainder function226 227 `remquoq': remainder and part of quotient228 229 `rintq': round-to-nearest integral value230 231 `roundq': round-to-nearest integral value, return `__float128'232 233 `scalblnq': compute exponent using `FLT_RADIX'234 235 `scalbnq': compute exponent using `FLT_RADIX'236 237 `signbitq': return sign bit238 239 `sincosq': calculate sine and cosine simulataneously240 241 `sinhq': hyperbolic sine function242 243 `sinq': sine function244 245 `sqrtq': square root function246 247 `tanq': tangent function248 249 `tanhq': hyperbolic tangent function250 251 `tgammaq': true gamma function252 253 `truncq': round to integer, towards zero254 255 `y0q': Bessel function of the second kind, first order256 257 `y1q': Bessel function of the second kind, second order258 259 `ynq': Bessel function of the second kind, N-th order260 261 `cabsq' complex absolute value function262 263 `cargq': calculate the argument264 265 `cimagq' imaginary part of complex number266 267 `crealq': real part of complex number268 269 `cacoshq': complex arc hyperbolic cosine function270 271 `cacosq': complex arc cosine function272 273 `casinhq': complex arc hyperbolic sine function274 275 `casinq': complex arc sine function276 277 `catanhq': complex arc hyperbolic tangent function278 279 `catanq': complex arc tangent function280 281 `ccosq' complex cosine function:282 283 `ccoshq': complex hyperbolic cosine function284 285 `cexpq': complex exponential function286 287 `cexpiq': computes the exponential function of "i" times a288 real value289 290 `clogq': complex natural logarithm291 292 `clog10q': complex base 10 logarithm293 294 `conjq': complex conjugate function295 296 `cpowq': complex power function297 298 `cprojq': project into Riemann Sphere299 300 `csinq': complex sine function301 302 `csinhq': complex hyperbolic sine function303 304 `csqrtq': complex square root305 306 `ctanq': complex tangent function307 308 `ctanhq': complex hyperbolic tangent function309 310 311 File: libquadmath.info, Node: I/O Library Routines, Next: GNU Free Documentation License, Prev: Math Library Routines, Up: Top312 313 3 I/O Library Routines314 **********************315 316 * Menu:317 318 * `strtoflt128': strtoflt128, Convert from string319 * `quadmath_snprintf': quadmath_snprintf, Convert to string320 321 322 File: libquadmath.info, Node: strtoflt128, Next: quadmath_snprintf, Up: I/O Library Routines323 324 3.1 `strtoflt128' -- Convert from string325 ========================================326 327 The function `dmath_strtopQ' converts a string into a `__float128'328 number.329 330 Syntax331 `__float128 strtoflt128 (const char *s, char **sp)'332 333 _Arguments_:334 S input string335 SP the address of the next character in the string336 337 The argument SP contains, if not `NULL', the address of the next338 character following the parts of the string, which have been read.339 340 Example341 #include <quadmath.h>342 343 int main ()344 {345 __float128 r;346 347 r = strtoflt128 ("1.2345678", NULL);348 349 return 0;350 }351 352 353 File: libquadmath.info, Node: quadmath_snprintf, Prev: strtoflt128, Up: I/O Library Routines354 355 3.2 `quadmath_snprintf' -- Convert to string356 ============================================357 358 The function `quadmath_snprintf' converts a `__float128' floating-point359 number into a string. It is a specialized alternative to `snprintf',360 where the format string is restricted to a single conversion specifier361 with `Q' modifier and conversion specifier `e', `E', `f', `F', `g',362 `G', `a' or `A', with no extra characters before or after the363 conversion specifier. The `%m$' or `*m$' style must not be used in the364 format.365 366 Syntax367 `int quadmath_snprintf (char *s, size_t size, const char *format,368 ...)'369 370 _Arguments_:371 S output string372 SIZE byte size of the string, including tailing NUL373 FORMAT conversion specifier string374 375 Example376 #include <quadmath.h>377 #include <stdlib.h>378 #include <stdio.h>379 380 int main ()381 {382 __float128 r;383 int prec = 20;384 int width = 46;385 char buf[128];386 387 r = 2.0q;388 r = sqrtq (r);389 int n = quadmath_snprintf (buf, sizeof buf, "%+-#*.20Qe", width, r);390 if ((size_t) n < sizeof buf)391 printf ("%s\n", buf);392 /* Prints: +1.41421356237309504880e+00 */393 quadmath_snprintf (buf, sizeof buf, "%Qa", r);394 if ((size_t) n < sizeof buf)395 printf ("%s\n", buf);396 /* Prints: 0x1.6a09e667f3bcc908b2fb1366ea96p+0 */397 n = quadmath_snprintf (NULL, 0, "%+-#46.*Qe", prec, r);398 if (n > -1)399 {400 char *str = malloc (n + 1);401 if (str)402 {403 quadmath_snprintf (str, n + 1, "%+-#46.*Qe", prec, r);404 printf ("%s\n", str);405 /* Prints: +1.41421356237309504880e+00 */406 }407 free (str);408 }409 return 0;410 }411 412 413 On some targets when supported by the C library hooks are installed414 for `printf' family of functions, so that `printf ("%Qe", 1.2Q);' etc.415 works too.416 417 418 File: libquadmath.info, Node: GNU Free Documentation License, Next: Reporting Bugs, Prev: I/O Library Routines, Up: Top419 420 GNU Free Documentation License421 ******************************422 423 Version 1.3, 3 November 2008424 425 Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.426 `http://fsf.org/'427 428 Everyone is permitted to copy and distribute verbatim copies429 of this license document, but changing it is not allowed.430 431 0. PREAMBLE432 433 The purpose of this License is to make a manual, textbook, or other434 functional and useful document "free" in the sense of freedom: to435 assure everyone the effective freedom to copy and redistribute it,436 with or without modifying it, either commercially or437 noncommercially. Secondarily, this License preserves for the438 author and publisher a way to get credit for their work, while not439 being considered responsible for modifications made by others.440 441 This License is a kind of "copyleft", which means that derivative442 works of the document must themselves be free in the same sense.443 It complements the GNU General Public License, which is a copyleft444 license designed for free software.445 446 We have designed this License in order to use it for manuals for447 free software, because free software needs free documentation: a448 free program should come with manuals providing the same freedoms449 that the software does. But this License is not limited to450 software manuals; it can be used for any textual work, regardless451 of subject matter or whether it is published as a printed book.452 We recommend this License principally for works whose purpose is453 instruction or reference.454 455 1. APPLICABILITY AND DEFINITIONS456 457 This License applies to any manual or other work, in any medium,458 that contains a notice placed by the copyright holder saying it459 can be distributed under the terms of this License. Such a notice460 grants a world-wide, royalty-free license, unlimited in duration,461 to use that work under the conditions stated herein. The462 "Document", below, refers to any such manual or work. Any member463 of the public is a licensee, and is addressed as "you". You464 accept the license if you copy, modify or distribute the work in a465 way requiring permission under copyright law.466 467 A "Modified Version" of the Document means any work containing the468 Document or a portion of it, either copied verbatim, or with469 modifications and/or translated into another language.470 471 A "Secondary Section" is a named appendix or a front-matter section472 of the Document that deals exclusively with the relationship of the473 publishers or authors of the Document to the Document's overall474 subject (or to related matters) and contains nothing that could475 fall directly within that overall subject. (Thus, if the Document476 is in part a textbook of mathematics, a Secondary Section may not477 explain any mathematics.) The relationship could be a matter of478 historical connection with the subject or with related matters, or479 of legal, commercial, philosophical, ethical or political position480 regarding them.481 482 The "Invariant Sections" are certain Secondary Sections whose483 titles are designated, as being those of Invariant Sections, in484 the notice that says that the Document is released under this485 License. If a section does not fit the above definition of486 Secondary then it is not allowed to be designated as Invariant.487 The Document may contain zero Invariant Sections. If the Document488 does not identify any Invariant Sections then there are none.489 490 The "Cover Texts" are certain short passages of text that are491 listed, as Front-Cover Texts or Back-Cover Texts, in the notice492 that says that the Document is released under this License. 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For524 works in formats which do not have any title page as such, "Title525 Page" means the text near the most prominent appearance of the526 work's title, preceding the beginning of the body of the text.527 528 The "publisher" means any person or entity that distributes copies529 of the Document to the public.530 531 A section "Entitled XYZ" means a named subunit of the Document532 whose title either is precisely XYZ or contains XYZ in parentheses533 following text that translates XYZ in another language. (Here XYZ534 stands for a specific section name mentioned below, such as535 "Acknowledgements", "Dedications", "Endorsements", or "History".)536 To "Preserve the Title" of such a section when you modify the537 Document means that it remains a section "Entitled XYZ" according538 to this definition.539 540 The Document may include Warranty Disclaimers next to the notice541 which states that this License applies to the Document. These542 Warranty Disclaimers are considered to be included by reference in543 this License, but only as regards disclaiming warranties: any other544 implication that these Warranty Disclaimers may have is void and545 has no effect on the meaning of this License.546 547 2. VERBATIM COPYING548 549 You may copy and distribute the Document in any medium, either550 commercially or noncommercially, provided that this License, the551 copyright notices, and the license notice saying this License552 applies to the Document are reproduced in all copies, and that you553 add no other conditions whatsoever to those of this License. You554 may not use technical measures to obstruct or control the reading555 or further copying of the copies you make or distribute. However,556 you may accept compensation in exchange for copies. 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MODIFICATIONS604 605 You may copy and distribute a Modified Version of the Document606 under the conditions of sections 2 and 3 above, provided that you607 release the Modified Version under precisely this License, with608 the Modified Version filling the role of the Document, thus609 licensing distribution and modification of the Modified Version to610 whoever possesses a copy of it. In addition, you must do these611 things in the Modified Version:612 613 A. Use in the Title Page (and on the covers, if any) a title614 distinct from that of the Document, and from those of615 previous versions (which should, if there were any, be listed616 in the History section of the Document). You may use the617 same title as a previous version if the original publisher of618 that version gives permission.619 620 B. List on the Title Page, as authors, one or more persons or621 entities responsible for authorship of the modifications in622 the Modified Version, together with at least five of the623 principal authors of the Document (all of its principal624 authors, if it has fewer than five), unless they release you625 from this requirement.626 627 C. State on the Title page the name of the publisher of the628 Modified Version, as the publisher.629 630 D. Preserve all the copyright notices of the Document.631 632 E. Add an appropriate copyright notice for your modifications633 adjacent to the other copyright notices.634 635 F. Include, immediately after the copyright notices, a license636 notice giving the public permission to use the Modified637 Version under the terms of this License, in the form shown in638 the Addendum below.639 640 G. Preserve in that license notice the full lists of Invariant641 Sections and required Cover Texts given in the Document's642 license notice.643 644 H. Include an unaltered copy of this License.645 646 I. Preserve the section Entitled "History", Preserve its Title,647 and add to it an item stating at least the title, year, new648 authors, and publisher of the Modified Version as given on649 the Title Page. If there is no section Entitled "History" in650 the Document, create one stating the title, year, authors,651 and publisher of the Document as given on its Title Page,652 then add an item describing the Modified Version as stated in653 the previous sentence.654 655 J. Preserve the network location, if any, given in the Document656 for public access to a Transparent copy of the Document, and657 likewise the network locations given in the Document for658 previous versions it was based on. These may be placed in659 the "History" section. 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Preserve any Warranty Disclaimers.682 683 If the Modified Version includes new front-matter sections or684 appendices that qualify as Secondary Sections and contain no685 material copied from the Document, you may at your option686 designate some or all of these sections as invariant. To do this,687 add their titles to the list of Invariant Sections in the Modified688 Version's license notice. These titles must be distinct from any689 other section titles.690 691 You may add a section Entitled "Endorsements", provided it contains692 nothing but endorsements of your Modified Version by various693 parties--for example, statements of peer review or that the text694 has been approved by an organization as the authoritative695 definition of a standard.696 697 You may add a passage of up to five words as a Front-Cover Text,698 and a passage of up to 25 words as a Back-Cover Text, to the end699 of the list of Cover Texts in the Modified Version. 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COMBINING DOCUMENTS713 714 You may combine the Document with other documents released under715 this License, under the terms defined in section 4 above for716 modified versions, provided that you include in the combination717 all of the Invariant Sections of all of the original documents,718 unmodified, and list them all as Invariant Sections of your719 combined work in its license notice, and that you preserve all720 their Warranty Disclaimers.721 722 The combined work need only contain one copy of this License, and723 multiple identical Invariant Sections may be replaced with a single724 copy. If there are multiple Invariant Sections with the same name725 but different contents, make the title of each such section unique726 by adding at the end of it, in parentheses, the name of the727 original author or publisher of that section if known, or else a728 unique number. Make the same adjustment to the section titles in729 the list of Invariant Sections in the license notice of the730 combined work.731 732 In the combination, you must combine any sections Entitled733 "History" in the various original documents, forming one section734 Entitled "History"; likewise combine any sections Entitled735 "Acknowledgements", and any sections Entitled "Dedications". You736 must delete all sections Entitled "Endorsements."737 738 6. COLLECTIONS OF DOCUMENTS739 740 You may make a collection consisting of the Document and other741 documents released under this License, and replace the individual742 copies of this License in the various documents with a single copy743 that is included in the collection, provided that you follow the744 rules of this License for verbatim copying of each of the745 documents in all other respects.746 747 You may extract a single document from such a collection, and748 distribute it individually under this License, provided you insert749 a copy of this License into the extracted document, and follow750 this License in all other respects regarding verbatim copying of751 that document.752 753 7. AGGREGATION WITH INDEPENDENT WORKS754 755 A compilation of the Document or its derivatives with other756 separate and independent documents or works, in or on a volume of757 a storage or distribution medium, is called an "aggregate" if the758 copyright resulting from the compilation is not used to limit the759 legal rights of the compilation's users beyond what the individual760 works permit. When the Document is included in an aggregate, this761 License does not apply to the other works in the aggregate which762 are not themselves derivative works of the Document.763 764 If the Cover Text requirement of section 3 is applicable to these765 copies of the Document, then if the Document is less than one half766 of the entire aggregate, the Document's Cover Texts may be placed767 on covers that bracket the Document within the aggregate, or the768 electronic equivalent of covers if the Document is in electronic769 form. Otherwise they must appear on printed covers that bracket770 the whole aggregate.771 772 8. TRANSLATION773 774 Translation is considered a kind of modification, so you may775 distribute translations of the Document under the terms of section776 4. Replacing Invariant Sections with translations requires special777 permission from their copyright holders, but you may include778 translations of some or all Invariant Sections in addition to the779 original versions of these Invariant Sections. You may include a780 translation of this License, and all the license notices in the781 Document, and any Warranty Disclaimers, provided that you also782 include the original English version of this License and the783 original versions of those notices and disclaimers. In case of a784 disagreement between the translation and the original version of785 this License or a notice or disclaimer, the original version will786 prevail.787 788 If a section in the Document is Entitled "Acknowledgements",789 "Dedications", or "History", the requirement (section 4) to790 Preserve its Title (section 1) will typically require changing the791 actual title.792 793 9. TERMINATION794 795 You may not copy, modify, sublicense, or distribute the Document796 except as expressly provided under this License. Any attempt797 otherwise to copy, modify, sublicense, or distribute it is void,798 and will automatically terminate your rights under this License.799 800 However, if you cease all violation of this License, then your801 license from a particular copyright holder is reinstated (a)802 provisionally, unless and until the copyright holder explicitly803 and finally terminates your license, and (b) permanently, if the804 copyright holder fails to notify you of the violation by some805 reasonable means prior to 60 days after the cessation.806 807 Moreover, your license from a particular copyright holder is808 reinstated permanently if the copyright holder notifies you of the809 violation by some reasonable means, this is the first time you have810 received notice of violation of this License (for any work) from811 that copyright holder, and you cure the violation prior to 30 days812 after your receipt of the notice.813 814 Termination of your rights under this section does not terminate815 the licenses of parties who have received copies or rights from816 you under this License. If your rights have been terminated and817 not permanently reinstated, receipt of a copy of some or all of818 the same material does not give you any rights to use it.819 820 10. FUTURE REVISIONS OF THIS LICENSE821 822 The Free Software Foundation may publish new, revised versions of823 the GNU Free Documentation License from time to time. Such new824 versions will be similar in spirit to the present version, but may825 differ in detail to address new problems or concerns. See826 `http://www.gnu.org/copyleft/'.827 828 Each version of the License is given a distinguishing version829 number. If the Document specifies that a particular numbered830 version of this License "or any later version" applies to it, you831 have the option of following the terms and conditions either of832 that specified version or of any later version that has been833 published (not as a draft) by the Free Software Foundation. If834 the Document does not specify a version number of this License,835 you may choose any version ever published (not as a draft) by the836 Free Software Foundation. If the Document specifies that a proxy837 can decide which future versions of this License can be used, that838 proxy's public statement of acceptance of a version permanently839 authorizes you to choose that version for the Document.840 841 11. RELICENSING842 843 "Massive Multiauthor Collaboration Site" (or "MMC Site") means any844 World Wide Web server that publishes copyrightable works and also845 provides prominent facilities for anybody to edit those works. A846 public wiki that anybody can edit is an example of such a server.847 A "Massive Multiauthor Collaboration" (or "MMC") contained in the848 site means any set of copyrightable works thus published on the MMC849 site.850 851 "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0852 license published by Creative Commons Corporation, a not-for-profit853 corporation with a principal place of business in San Francisco,854 California, as well as future copyleft versions of that license855 published by that same organization.856 857 "Incorporate" means to publish or republish a Document, in whole or858 in part, as part of another Document.859 860 An MMC is "eligible for relicensing" if it is licensed under this861 License, and if all works that were first published under this862 License somewhere other than this MMC, and subsequently863 incorporated in whole or in part into the MMC, (1) had no cover864 texts or invariant sections, and (2) were thus incorporated prior865 to November 1, 2008.866 867 The operator of an MMC Site may republish an MMC contained in the868 site under CC-BY-SA on the same site at any time before August 1,869 2009, provided the MMC is eligible for relicensing.870 871 872 ADDENDUM: How to use this License for your documents873 ====================================================874 875 To use this License in a document you have written, include a copy of876 the License in the document and put the following copyright and license877 notices just after the title page:878 879 Copyright (C) YEAR YOUR NAME.880 Permission is granted to copy, distribute and/or modify this document881 under the terms of the GNU Free Documentation License, Version 1.3882 or any later version published by the Free Software Foundation;883 with no Invariant Sections, no Front-Cover Texts, and no Back-Cover884 Texts. A copy of the license is included in the section entitled ``GNU885 Free Documentation License''.886 887 If you have Invariant Sections, Front-Cover Texts and Back-Cover888 Texts, replace the "with...Texts." line with this:889 890 with the Invariant Sections being LIST THEIR TITLES, with891 the Front-Cover Texts being LIST, and with the Back-Cover Texts892 being LIST.893 894 If you have Invariant Sections without Cover Texts, or some other895 combination of the three, merge those two alternatives to suit the896 situation.897 898 If your document contains nontrivial examples of program code, we899 recommend releasing these examples in parallel under your choice of900 free software license, such as the GNU General Public License, to901 permit their use in free software.902 903 904 File: libquadmath.info, Node: Reporting Bugs, Prev: GNU Free Documentation License, Up: Top905 906 4 Reporting Bugs907 ****************908 909 Bugs in the GCC Quad-Precision Math Library implementation should be910 reported via `http://gcc.gnu.org/bugs.html'.911 912 913 914 Tag Table:915 Node: Top1661916 Node: Typedef and constants2395917 Node: Math Library Routines3813918 Node: I/O Library Routines7618919 Node: strtoflt1287943920 Node: quadmath_snprintf8703921 Node: GNU Free Documentation License10894922 Node: Reporting Bugs36060923 924 End Tag Table -
libstdc++-v3/acinclude.m4
diff -Naur gcc-4.6.3.orig/libstdc++-v3/acinclude.m4 gcc-4.6.3/libstdc++-v3/acinclude.m4
old new 3213 3213 ]) 3214 3214 ]) 3215 3215 3216 dnl 3217 dnl Check whether gthreads types can be copy-assigned in C++11 mode. 3218 dnl 3219 AC_DEFUN([GLIBCXX_GTHREADS_CXX11_COPY_ASSIGN], [ 3220 3221 AC_LANG_SAVE 3222 AC_LANG_CPLUSPLUS 3223 ac_save_CXXFLAGS="$CXXFLAGS" 3224 CXXFLAGS="$CXXFLAGS -std=c++0x -I${toplevel_srcdir}/gcc" 3225 3226 target_thread_file=`$CXX -v 2>&1 | sed -n 's/^Thread model: //p'` 3227 case $target_thread_file in 3228 posix) 3229 CXXFLAGS="$CXXFLAGS -DSUPPORTS_WEAK -DGTHREAD_USE_WEAK -D_PTHREADS" 3230 esac 3231 3232 AC_MSG_CHECKING([whether gthreads types are copy-assignable in C++11 mode]) 3233 3234 AC_TRY_COMPILE([#include "gthr.h"], 3235 [ 3236 #ifdef __GTHREAD_MUTEX_INIT 3237 __gthread_mutex_t m1; 3238 __gthread_mutex_t m2 = __GTHREAD_MUTEX_INIT; 3239 m1 = m2; 3240 #endif 3241 #ifdef __GTHREAD_RECURSIVE_MUTEX_INIT 3242 __gthread_recursive_mutex_t r1; 3243 __gthread_recursive_mutex_t r2 = __GTHREAD_RECURSIVE_MUTEX_INIT; 3244 r1 = r2; 3245 #endif 3246 #ifdef __GTHREAD_HAS_COND 3247 #ifdef __GTHREAD_COND_INIT 3248 __gthread_cond_t c1; 3249 __gthread_cond_t c2 = __GTHREAD_COND_INIT; 3250 c1 = c2; 3251 #endif 3252 #endif 3253 ], [ac_gthread_cxx11_copy_assign=1], [ac_gthread_cxx11_copy_assign=0]) 3254 3255 if test $ac_gthread_cxx11_copy_assign = 1 ; then res_gthr_copy_assign=yes ; 3256 else res_gthr_copy_assign=no ; fi 3257 AC_MSG_RESULT([$res_gthr_copy_assign]) 3258 3259 if test x"$res_gthr_copy_assign" = x"no"; then 3260 AC_DEFINE(_GLIBCXX_GTHREADS_NO_COPY_ASSIGN_IN_CXX11, 1, 3261 [Define if gthreads types cannot be copy-assigned in C++11.]) 3262 fi 3263 3264 CXXFLAGS="$ac_save_CXXFLAGS" 3265 AC_LANG_RESTORE 3266 ]) 3267 3216 3268 # Macros from the top-level gcc directory. 3217 3269 m4_include([../config/gc++filt.m4]) 3218 3270 m4_include([../config/tls.m4]) -
libstdc++-v3/config/os/bsd/netbsd/ctype_base.h
diff -Naur gcc-4.6.3.orig/libstdc++-v3/config/os/bsd/netbsd/ctype_base.h gcc-4.6.3/libstdc++-v3/config/os/bsd/netbsd/ctype_base.h
old new 1 1 // Locale support -*- C++ -*- 2 2 3 // Copyright (C) 2000, 2009 Free Software Foundation, Inc.3 // Copyright (C) 2000, 2009, 2011, 2012 Free Software Foundation, Inc. 4 4 // 5 5 // This file is part of the GNU ISO C++ Library. This library is free 6 6 // software; you can redistribute it and/or modify it under the … … 31 31 // anoncvs@anoncvs.netbsd.org:/cvsroot/basesrc/include/ctype.h 32 32 // See www.netbsd.org for details of access. 33 33 34 #include <sys/param.h>35 36 34 namespace std _GLIBCXX_VISIBILITY(default) 37 35 { 38 36 _GLIBCXX_BEGIN_NAMESPACE_VERSION … … 47 45 // on the mask type. Because of this, we don't use an enum. 48 46 typedef unsigned char mask; 49 47 50 #if __NetBSD_Version__ < 59900410048 #ifndef _CTYPE_U 51 49 static const mask upper = _U; 52 50 static const mask lower = _L; 53 51 static const mask alpha = _U | _L; -
libstdc++-v3/config.h.in
diff -Naur gcc-4.6.3.orig/libstdc++-v3/config.h.in gcc-4.6.3/libstdc++-v3/config.h.in
old new 692 692 /* Define if a fully dynamic basic_string is wanted. */ 693 693 #undef _GLIBCXX_FULLY_DYNAMIC_STRING 694 694 695 /* Define if gthreads types cannot be copy-assigned in C++11. */ 696 #undef _GLIBCXX_GTHREADS_NO_COPY_ASSIGN_IN_CXX11 697 695 698 /* Defi