1 | <?xml version="1.0" encoding="ISO-8859-1"?>
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2 | <!DOCTYPE sect1 PUBLIC "-//OASIS//DTD DocBook XML V4.5//EN"
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3 | "http://www.oasis-open.org/docbook/xml/4.5/docbookx.dtd" [
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4 | <!ENTITY % general-entities SYSTEM "../../general.ent">
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5 | %general-entities;
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6 | ]>
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7 |
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8 | <sect1 id="ch-cross-tools-variables">
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9 | <?dbhtml filename="variables.html"?>
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10 |
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11 | <title>Build Variables</title>
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12 |
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13 | <bridgehead renderas="sect4">Setting Host and Target</bridgehead>
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14 |
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15 | <xi:include xmlns:xi="http://www.w3.org/2003/XInclude"
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16 | href="../x86/variables.xml"
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17 | xpointer="xpointer(//*[@os='a'])"/>
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18 |
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19 | <xi:include xmlns:xi="http://www.w3.org/2003/XInclude"
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20 | href="../x86/variables.xml"
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21 | xpointer="xpointer(//*[@os='b'])"/>
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22 |
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23 | <xi:include xmlns:xi="http://www.w3.org/2003/XInclude"
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24 | href="../x86/variables.xml"
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25 | xpointer="xpointer(//*[@os='c'])"/>
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26 |
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27 | <xi:include xmlns:xi="http://www.w3.org/2003/XInclude"
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28 | href="../x86/variables.xml"
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29 | xpointer="xpointer(//*[@os='d'])"/>
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30 |
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31 | <para os="d1">Now you will need to set the MIPS LEVEL. This determines how your
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32 | uClibc is built. There are currently 5 MIPS ISA Levels. To keep things simple
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33 | we are only using 2. For more information, go to
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34 | <ulink url="http://www.linux-mips.org/wiki/Instruction_Set_Architecture"/></para>
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35 |
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36 | <screen os="d2"><userinput>export CLFS_MIPS_LEVEL="{mips level}"</userinput></screen>
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37 |
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38 | <xi:include xmlns:xi="http://www.w3.org/2003/XInclude"
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39 | href="../x86/variables.xml"
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40 | xpointer="xpointer(//*[@os='e'])"/>
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41 |
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42 | <screen os="f"><userinput>echo export CLFS_HOST=\""${CLFS_HOST}\"" >> ~/.bashrc
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43 | echo export CLFS_TARGET=\""${CLFS_TARGET}\"" >> ~/.bashrc
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44 | echo export CLFS_MIPS_LEVEL=\""${CLFS_MIPS_LEVEL}\"" >> ~/.bashrc</userinput></screen>
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45 |
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46 | <table os="g">
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47 | <title>Processor Type and Target Triplets</title>
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48 | <tgroup cols="2" align="center">
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49 | <colspec colname="Processor"/>
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50 | <colspec colname="Triplet"/>
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51 | <colspec colname="MIPS Level"/>
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52 | <thead>
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53 | <row>
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54 | <entry>Processor</entry>
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55 | <entry>Target Triplet</entry>
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56 | <entry>MIPS Level</entry>
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57 | </row>
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58 | </thead>
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59 | <tbody>
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60 | <row>
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61 | <entry>MIPS 32 bits Little Endian</entry>
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62 | <entry>mipsel-unknown-linux-uclibc</entry>
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63 | <entry>1</entry>
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64 | </row>
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65 | <row>
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66 | <entry>MIPS 32 bits Big Endian</entry>
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67 | <entry>mips-unknown-linux-uclibc</entry>
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68 | <entry>1</entry>
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69 | </row>
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70 | <row>
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71 | <entry>MIPS 64 bits Little Endian</entry>
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72 | <entry>mips64el-unknown-linux-uclibc</entry>
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73 | <entry>3</entry>
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74 | </row>
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75 | <row>
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76 | <entry>MIPS 64 bits Big Endian</entry>
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77 | <entry>mips64-unknown-linux-uclibc</entry>
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78 | <entry>3</entry>
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79 | </row>
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80 | </tbody>
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81 | </tgroup>
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82 | </table>
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83 |
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84 | </sect1>
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